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599bc5e89c
This patch implements read and write access rules for Mips floating point control and status register (FCR31). The change can be divided into following parts: - Add fields that will keep FCR31's R/W bitmask in procesor definitions and processor float_status structure. - Add appropriate value for FCR31's R/W bitmask for each supported processor. - Add function for setting snan_bit_is_one, and integrate it in appropriate places. - Modify handling of CTC1 (case 31) instruction to use FCR31's R/W bitmask. - Modify handling user mode executables for Mips, in relation to the bit EF_MIPS_NAN2008 from ELF header, that is in turn related to reading and writing to FCR31. - Modify gdb behavior in relation to FCR31. Signed-off-by: Thomas Schwinge <thomas@codesourcery.com> Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> |
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.. | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
dsp_helper.c | ||
gdbstub.c | ||
helper.c | ||
helper.h | ||
kvm_mips.h | ||
kvm.c | ||
lmi_helper.c | ||
machine.c | ||
Makefile.objs | ||
mips-defs.h | ||
mips-semi.c | ||
msa_helper.c | ||
op_helper.c | ||
TODO | ||
translate_init.c | ||
translate.c |