Philippe Mathieu-Daudé 5f89ce4fc2 target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5 ...

The MIPS ISA release 5 is common to 32/64-bit CPUs.

To avoid holes in the insn_flags type, update the
definition with the next available bit.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-15-f4bug@amsat.org>

2021-01-14 17:13:53 +01:00

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alpha

migration: Replace migration's JSON writer by the general one

2020-12-19 10:39:16 +01:00

arm

target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns

2021-01-12 21:19:02 +00:00

avr

tcg: Make tb arg to synchronize_from_tb const

2021-01-07 05:09:41 -10:00

cris

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hppa

tcg: Make tb arg to synchronize_from_tb const

2021-01-07 05:09:41 -10:00

i386

target/i386: Use X86Seg enum for segment registers

2021-01-12 17:05:10 +01:00

lm32

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m68k

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microblaze

tcg: Make tb arg to synchronize_from_tb const

2021-01-07 05:09:41 -10:00

mips

target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5

2021-01-14 17:13:53 +01:00

moxie

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nios2

target/nios2: Use deposit32() to update ipending register

2020-12-15 12:04:30 +00:00

openrisc

migration: Replace migration's JSON writer by the general one

2020-12-19 10:39:16 +01:00

ppc

migration: Replace migration's JSON writer by the general one

2020-12-19 10:39:16 +01:00

riscv

tcg: Make tb arg to synchronize_from_tb const

2021-01-07 05:09:41 -10:00

rx

tcg: Make tb arg to synchronize_from_tb const

2021-01-07 05:09:41 -10:00

s390x

Remove superfluous timer_del() calls

2021-01-08 15:13:38 +00:00

sh4

tcg: Make tb arg to synchronize_from_tb const

2021-01-07 05:09:41 -10:00

sparc

tcg: Make tb arg to synchronize_from_tb const

2021-01-07 05:09:41 -10:00

tilegx

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tricore

tcg: Make tb arg to synchronize_from_tb const

2021-01-07 05:09:41 -10:00

unicore32

target/unicore32/translate: Add missing fallthrough annotations

2020-12-18 09:14:22 +01:00

xtensa

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meson.build

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