xemu/target-tricore
Bastian Koppelmann 6d2afc8a5e target-tricore: introduce ISA v1.6.1 feature
The aurix platform contains of several different cpu models and uses
the 1.6.1 ISA. This patch changes the generic aurix model to the more
specific tc27x cpu model and sets specific features.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2015-05-22 17:02:33 +02:00
..
cpu-qom.h target-tricore: Remove the dummy interrupt boilerplate 2014-09-25 18:54:22 +01:00
cpu.c target-tricore: introduce ISA v1.6.1 feature 2015-05-22 17:02:33 +02:00
cpu.h target-tricore: introduce ISA v1.6.1 feature 2015-05-22 17:02:33 +02:00
csfr.def target-tricore: Fix new typos 2015-01-15 10:44:13 +03:00
helper.c target-tricore: Remove the dummy interrupt boilerplate 2014-09-25 18:54:22 +01:00
helper.h target-tricore: Add instructions of SYS opcode format 2015-03-16 15:53:08 +00:00
Makefile.objs target-tricore: Add target stubs and qom-cpu 2014-09-01 14:49:20 +01:00
op_helper.c target-tricore: fix rfe not restoring the PC 2015-05-11 14:25:49 +02:00
translate.c target-tricore: fix SLR_LD_W and SLR_LD_W_POSTINC insn being a 2 byte memory access insted of 4 2015-05-11 14:15:46 +02:00
tricore-defs.h target-tricore: Add target stubs and qom-cpu 2014-09-01 14:49:20 +01:00
tricore-opcodes.h target-tricore: fix BO_OFF10_SEXT calculating the wrong offset 2015-05-11 14:15:46 +02:00