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1f5c00cfdb
It is a common thing amongst the various cpu reset functions want to flush the SoftMMU's TLB entries. This is done either by calling tlb_flush directly or by way of a general memset of the CPU structure (sometimes both). This moves the tlb_flush call to the common reset function and additionally ensures it is only done for the CONFIG_SOFTMMU case and when tcg is enabled. In some target cases we add an empty end_of_reset_fields structure to the target vCPU structure so have a clear end point for any memset which is resetting value in the structure before CPU_COMMON (where the TLB structures are). While this is a nice clean-up in general it is also a precursor for changes coming to cputlb for MTTCG where the clearing of entries can't be done arbitrarily across vCPUs. Currently the cpu_reset function is usually called from the context of another vCPU as the architectural power up sequence is run. By using the cputlb API functions we can ensure the right behaviour in the future. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
324 lines
9.1 KiB
C
324 lines
9.1 KiB
C
/*
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* QEMU Motorola 68k CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "cpu.h"
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#include "qemu-common.h"
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#include "migration/vmstate.h"
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#include "exec/exec-all.h"
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static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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cpu->env.pc = value;
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}
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static bool m68k_cpu_has_work(CPUState *cs)
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{
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return cs->interrupt_request & CPU_INTERRUPT_HARD;
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}
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static void m68k_set_feature(CPUM68KState *env, int feature)
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{
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env->features |= (1u << feature);
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}
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/* CPUClass::reset() */
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static void m68k_cpu_reset(CPUState *s)
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{
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M68kCPU *cpu = M68K_CPU(s);
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M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu);
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CPUM68KState *env = &cpu->env;
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mcc->parent_reset(s);
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memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
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#if !defined(CONFIG_USER_ONLY)
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env->sr = 0x2700;
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#endif
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m68k_switch_sp(env);
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/* ??? FP regs should be initialized to NaN. */
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cpu_m68k_set_ccr(env, 0);
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/* TODO: We should set PC from the interrupt vector. */
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env->pc = 0;
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}
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static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
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{
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M68kCPU *cpu = M68K_CPU(s);
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CPUM68KState *env = &cpu->env;
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info->print_insn = print_insn_m68k;
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if (m68k_feature(env, M68K_FEATURE_M68000)) {
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info->mach = bfd_mach_m68040;
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}
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}
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/* CPU models */
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static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
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{
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ObjectClass *oc;
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char *typename;
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if (cpu_model == NULL) {
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return NULL;
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}
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typename = g_strdup_printf("%s-" TYPE_M68K_CPU, cpu_model);
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oc = object_class_by_name(typename);
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g_free(typename);
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if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
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object_class_is_abstract(oc))) {
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return NULL;
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}
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return oc;
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}
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static void m5206_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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}
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static void m68000_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_M68000);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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}
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static void m68020_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_M68000);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_BCCL);
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m68k_set_feature(env, M68K_FEATURE_BITFIELD);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
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m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_FPU);
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m68k_set_feature(env, M68K_FEATURE_CAS);
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m68k_set_feature(env, M68K_FEATURE_BKPT);
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}
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#define m68030_cpu_initfn m68020_cpu_initfn
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#define m68040_cpu_initfn m68020_cpu_initfn
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static void m68060_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_M68000);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_BCCL);
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m68k_set_feature(env, M68K_FEATURE_BITFIELD);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
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m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_FPU);
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m68k_set_feature(env, M68K_FEATURE_CAS);
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m68k_set_feature(env, M68K_FEATURE_BKPT);
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}
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static void m5208_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_USP);
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}
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static void cfv4e_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_FPU);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_USP);
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}
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static void any_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_FPU);
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/* MAC and EMAC are mututally exclusive, so pick EMAC.
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It's mostly backwards compatible. */
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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}
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typedef struct M68kCPUInfo {
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const char *name;
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void (*instance_init)(Object *obj);
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} M68kCPUInfo;
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static const M68kCPUInfo m68k_cpus[] = {
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{ .name = "m68000", .instance_init = m68000_cpu_initfn },
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{ .name = "m68020", .instance_init = m68020_cpu_initfn },
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{ .name = "m68030", .instance_init = m68030_cpu_initfn },
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{ .name = "m68040", .instance_init = m68040_cpu_initfn },
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{ .name = "m68060", .instance_init = m68060_cpu_initfn },
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{ .name = "m5206", .instance_init = m5206_cpu_initfn },
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{ .name = "m5208", .instance_init = m5208_cpu_initfn },
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{ .name = "cfv4e", .instance_init = cfv4e_cpu_initfn },
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{ .name = "any", .instance_init = any_cpu_initfn },
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};
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static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
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{
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CPUState *cs = CPU(dev);
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M68kCPU *cpu = M68K_CPU(dev);
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M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
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Error *local_err = NULL;
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cpu_exec_realizefn(cs, &local_err);
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if (local_err != NULL) {
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error_propagate(errp, local_err);
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return;
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}
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m68k_cpu_init_gdb(cpu);
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cpu_reset(cs);
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qemu_init_vcpu(cs);
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mcc->parent_realize(dev, errp);
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}
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static void m68k_cpu_initfn(Object *obj)
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{
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CPUState *cs = CPU(obj);
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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static bool inited;
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cs->env_ptr = env;
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if (tcg_enabled() && !inited) {
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inited = true;
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m68k_tcg_init();
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}
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}
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static const VMStateDescription vmstate_m68k_cpu = {
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.name = "cpu",
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.unmigratable = 1,
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};
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static void m68k_cpu_class_init(ObjectClass *c, void *data)
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{
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M68kCPUClass *mcc = M68K_CPU_CLASS(c);
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CPUClass *cc = CPU_CLASS(c);
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DeviceClass *dc = DEVICE_CLASS(c);
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mcc->parent_realize = dc->realize;
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dc->realize = m68k_cpu_realizefn;
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mcc->parent_reset = cc->reset;
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cc->reset = m68k_cpu_reset;
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cc->class_by_name = m68k_cpu_class_by_name;
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cc->has_work = m68k_cpu_has_work;
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cc->do_interrupt = m68k_cpu_do_interrupt;
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cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
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cc->dump_state = m68k_cpu_dump_state;
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cc->set_pc = m68k_cpu_set_pc;
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cc->gdb_read_register = m68k_cpu_gdb_read_register;
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cc->gdb_write_register = m68k_cpu_gdb_write_register;
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#ifdef CONFIG_USER_ONLY
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cc->handle_mmu_fault = m68k_cpu_handle_mmu_fault;
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#else
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cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
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#endif
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cc->disas_set_info = m68k_cpu_disas_set_info;
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cc->gdb_num_core_regs = 18;
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cc->gdb_core_xml_file = "cf-core.xml";
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dc->vmsd = &vmstate_m68k_cpu;
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}
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static void register_cpu_type(const M68kCPUInfo *info)
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{
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TypeInfo type_info = {
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.parent = TYPE_M68K_CPU,
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.instance_init = info->instance_init,
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};
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type_info.name = g_strdup_printf("%s-" TYPE_M68K_CPU, info->name);
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type_register(&type_info);
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g_free((void *)type_info.name);
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}
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static const TypeInfo m68k_cpu_type_info = {
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.name = TYPE_M68K_CPU,
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.parent = TYPE_CPU,
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.instance_size = sizeof(M68kCPU),
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.instance_init = m68k_cpu_initfn,
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.abstract = true,
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.class_size = sizeof(M68kCPUClass),
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.class_init = m68k_cpu_class_init,
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};
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static void m68k_cpu_register_types(void)
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{
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int i;
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type_register_static(&m68k_cpu_type_info);
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for (i = 0; i < ARRAY_SIZE(m68k_cpus); i++) {
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register_cpu_type(&m68k_cpus[i]);
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}
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}
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type_init(m68k_cpu_register_types)
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