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The documentation of how overlapping memory regions behave and how the priority system works was rather brief, and confusion about priorities seems to be quite common for developers trying to understand how the memory region system works, so expand and clarify it. This includes a worked example with overlaps, documentation of the behaviour when an overlapped container has "holes", and mention that it's valid for a region to have both MMIO callbacks and subregions (and how this interacts with priorities when it does). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1381848154-31602-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@amazon.com>
240 lines
11 KiB
Plaintext
240 lines
11 KiB
Plaintext
The memory API
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==============
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The memory API models the memory and I/O buses and controllers of a QEMU
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machine. It attempts to allow modelling of:
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- ordinary RAM
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- memory-mapped I/O (MMIO)
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- memory controllers that can dynamically reroute physical memory regions
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to different destinations
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The memory model provides support for
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- tracking RAM changes by the guest
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- setting up coalesced memory for kvm
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- setting up ioeventfd regions for kvm
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Memory is modelled as an acyclic graph of MemoryRegion objects. Sinks
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(leaves) are RAM and MMIO regions, while other nodes represent
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buses, memory controllers, and memory regions that have been rerouted.
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In addition to MemoryRegion objects, the memory API provides AddressSpace
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objects for every root and possibly for intermediate MemoryRegions too.
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These represent memory as seen from the CPU or a device's viewpoint.
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Types of regions
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----------------
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There are four types of memory regions (all represented by a single C type
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MemoryRegion):
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- RAM: a RAM region is simply a range of host memory that can be made available
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to the guest.
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- MMIO: a range of guest memory that is implemented by host callbacks;
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each read or write causes a callback to be called on the host.
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- container: a container simply includes other memory regions, each at
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a different offset. Containers are useful for grouping several regions
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into one unit. For example, a PCI BAR may be composed of a RAM region
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and an MMIO region.
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A container's subregions are usually non-overlapping. In some cases it is
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useful to have overlapping regions; for example a memory controller that
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can overlay a subregion of RAM with MMIO or ROM, or a PCI controller
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that does not prevent card from claiming overlapping BARs.
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- alias: a subsection of another region. Aliases allow a region to be
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split apart into discontiguous regions. Examples of uses are memory banks
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used when the guest address space is smaller than the amount of RAM
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addressed, or a memory controller that splits main memory to expose a "PCI
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hole". Aliases may point to any type of region, including other aliases,
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but an alias may not point back to itself, directly or indirectly.
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It is valid to add subregions to a region which is not a pure container
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(that is, to an MMIO, RAM or ROM region). This means that the region
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will act like a container, except that any addresses within the container's
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region which are not claimed by any subregion are handled by the
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container itself (ie by its MMIO callbacks or RAM backing). However
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it is generally possible to achieve the same effect with a pure container
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one of whose subregions is a low priority "background" region covering
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the whole address range; this is often clearer and is preferred.
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Subregions cannot be added to an alias region.
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Region names
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------------
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Regions are assigned names by the constructor. For most regions these are
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only used for debugging purposes, but RAM regions also use the name to identify
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live migration sections. This means that RAM region names need to have ABI
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stability.
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Region lifecycle
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----------------
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A region is created by one of the constructor functions (memory_region_init*())
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and destroyed by the destructor (memory_region_destroy()). In between,
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a region can be added to an address space by using memory_region_add_subregion()
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and removed using memory_region_del_subregion(). Region attributes may be
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changed at any point; they take effect once the region becomes exposed to the
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guest.
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Overlapping regions and priority
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--------------------------------
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Usually, regions may not overlap each other; a memory address decodes into
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exactly one target. In some cases it is useful to allow regions to overlap,
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and sometimes to control which of an overlapping regions is visible to the
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guest. This is done with memory_region_add_subregion_overlap(), which
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allows the region to overlap any other region in the same container, and
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specifies a priority that allows the core to decide which of two regions at
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the same address are visible (highest wins).
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Priority values are signed, and the default value is zero. This means that
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you can use memory_region_add_subregion_overlap() both to specify a region
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that must sit 'above' any others (with a positive priority) and also a
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background region that sits 'below' others (with a negative priority).
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If the higher priority region in an overlap is a container or alias, then
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the lower priority region will appear in any "holes" that the higher priority
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region has left by not mapping subregions to that area of its address range.
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(This applies recursively -- if the subregions are themselves containers or
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aliases that leave holes then the lower priority region will appear in these
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holes too.)
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For example, suppose we have a container A of size 0x8000 with two subregions
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B and C. B is a container mapped at 0x2000, size 0x4000, priority 1; C is
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an MMIO region mapped at 0x0, size 0x6000, priority 2. B currently has two
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of its own subregions: D of size 0x1000 at offset 0 and E of size 0x1000 at
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offset 0x2000. As a diagram:
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0 1000 2000 3000 4000 5000 6000 7000 8000
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|------|------|------|------|------|------|------|-------|
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A: [ ]
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C: [CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC]
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B: [ ]
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D: [DDDDD]
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E: [EEEEE]
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The regions that will be seen within this address range then are:
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[CCCCCCCCCCCC][DDDDD][CCCCC][EEEEE][CCCCC]
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Since B has higher priority than C, its subregions appear in the flat map
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even where they overlap with C. In ranges where B has not mapped anything
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C's region appears.
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If B had provided its own MMIO operations (ie it was not a pure container)
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then these would be used for any addresses in its range not handled by
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D or E, and the result would be:
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[CCCCCCCCCCCC][DDDDD][BBBBB][EEEEE][BBBBB]
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Priority values are local to a container, because the priorities of two
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regions are only compared when they are both children of the same container.
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This means that the device in charge of the container (typically modelling
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a bus or a memory controller) can use them to manage the interaction of
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its child regions without any side effects on other parts of the system.
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In the example above, the priorities of D and E are unimportant because
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they do not overlap each other. It is the relative priority of B and C
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that causes D and E to appear on top of C: D and E's priorities are never
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compared against the priority of C.
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Visibility
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----------
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The memory core uses the following rules to select a memory region when the
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guest accesses an address:
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- all direct subregions of the root region are matched against the address, in
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descending priority order
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- if the address lies outside the region offset/size, the subregion is
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discarded
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- if the subregion is a leaf (RAM or MMIO), the search terminates, returning
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this leaf region
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- if the subregion is a container, the same algorithm is used within the
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subregion (after the address is adjusted by the subregion offset)
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- if the subregion is an alias, the search is continued at the alias target
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(after the address is adjusted by the subregion offset and alias offset)
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- if a recursive search within a container or alias subregion does not
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find a match (because of a "hole" in the container's coverage of its
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address range), then if this is a container with its own MMIO or RAM
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backing the search terminates, returning the container itself. Otherwise
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we continue with the next subregion in priority order
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- if none of the subregions match the address then the search terminates
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with no match found
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Example memory map
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------------------
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system_memory: container@0-2^48-1
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+---- lomem: alias@0-0xdfffffff ---> #ram (0-0xdfffffff)
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+---- himem: alias@0x100000000-0x11fffffff ---> #ram (0xe0000000-0xffffffff)
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+---- vga-window: alias@0xa0000-0xbfffff ---> #pci (0xa0000-0xbffff)
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| (prio 1)
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+---- pci-hole: alias@0xe0000000-0xffffffff ---> #pci (0xe0000000-0xffffffff)
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pci (0-2^32-1)
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+--- vga-area: container@0xa0000-0xbffff
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| +--- alias@0x00000-0x7fff ---> #vram (0x010000-0x017fff)
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| +--- alias@0x08000-0xffff ---> #vram (0x020000-0x027fff)
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+---- vram: ram@0xe1000000-0xe1ffffff
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+---- vga-mmio: mmio@0xe2000000-0xe200ffff
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ram: ram@0x00000000-0xffffffff
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This is a (simplified) PC memory map. The 4GB RAM block is mapped into the
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system address space via two aliases: "lomem" is a 1:1 mapping of the first
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3.5GB; "himem" maps the last 0.5GB at address 4GB. This leaves 0.5GB for the
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so-called PCI hole, that allows a 32-bit PCI bus to exist in a system with
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4GB of memory.
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The memory controller diverts addresses in the range 640K-768K to the PCI
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address space. This is modelled using the "vga-window" alias, mapped at a
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higher priority so it obscures the RAM at the same addresses. The vga window
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can be removed by programming the memory controller; this is modelled by
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removing the alias and exposing the RAM underneath.
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The pci address space is not a direct child of the system address space, since
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we only want parts of it to be visible (we accomplish this using aliases).
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It has two subregions: vga-area models the legacy vga window and is occupied
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by two 32K memory banks pointing at two sections of the framebuffer.
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In addition the vram is mapped as a BAR at address e1000000, and an additional
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BAR containing MMIO registers is mapped after it.
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Note that if the guest maps a BAR outside the PCI hole, it would not be
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visible as the pci-hole alias clips it to a 0.5GB range.
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Attributes
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----------
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Various region attributes (read-only, dirty logging, coalesced mmio, ioeventfd)
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can be changed during the region lifecycle. They take effect once the region
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is made visible (which can be immediately, later, or never).
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MMIO Operations
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---------------
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MMIO regions are provided with ->read() and ->write() callbacks; in addition
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various constraints can be supplied to control how these callbacks are called:
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- .valid.min_access_size, .valid.max_access_size define the access sizes
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(in bytes) which the device accepts; accesses outside this range will
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have device and bus specific behaviour (ignored, or machine check)
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- .valid.aligned specifies that the device only accepts naturally aligned
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accesses. Unaligned accesses invoke device and bus specific behaviour.
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- .impl.min_access_size, .impl.max_access_size define the access sizes
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(in bytes) supported by the *implementation*; other access sizes will be
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emulated using the ones available. For example a 4-byte write will be
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emulated using four 1-byte writes, if .impl.max_access_size = 1.
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- .impl.valid specifies that the *implementation* only supports unaligned
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accesses; unaligned accesses will be emulated by two aligned accesses.
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- .old_portio and .old_mmio can be used to ease porting from code using
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cpu_register_io_memory() and register_ioport(). They should not be used
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in new code.
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