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b7fcff0179
When we disable vnc from "./configure", QEMU can't use the vnc option. So qtest can't use the "vnc -none ", otherwise "make check" fails. If QEMU uses "-display none", "-vnc none" is excrescent, So we just need to drop it. Signed-off-by: Kewei Yu <keweihk@gmail.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
532 lines
14 KiB
C
532 lines
14 KiB
C
/*
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* IDE test cases
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*
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* Copyright (c) 2013 Kevin Wolf <kwolf@redhat.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include <string.h>
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#include <stdio.h>
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#include <glib.h>
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#include "libqtest.h"
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#include "libqos/pci-pc.h"
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#include "libqos/malloc-pc.h"
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#include "qemu-common.h"
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#include "hw/pci/pci_ids.h"
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#include "hw/pci/pci_regs.h"
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#define TEST_IMAGE_SIZE 64 * 1024 * 1024
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#define IDE_PCI_DEV 1
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#define IDE_PCI_FUNC 1
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#define IDE_BASE 0x1f0
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#define IDE_PRIMARY_IRQ 14
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enum {
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reg_data = 0x0,
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reg_nsectors = 0x2,
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reg_lba_low = 0x3,
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reg_lba_middle = 0x4,
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reg_lba_high = 0x5,
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reg_device = 0x6,
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reg_status = 0x7,
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reg_command = 0x7,
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};
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enum {
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BSY = 0x80,
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DRDY = 0x40,
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DF = 0x20,
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DRQ = 0x08,
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ERR = 0x01,
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};
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enum {
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DEV = 0x10,
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LBA = 0x40,
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};
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enum {
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bmreg_cmd = 0x0,
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bmreg_status = 0x2,
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bmreg_prdt = 0x4,
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};
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enum {
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CMD_READ_DMA = 0xc8,
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CMD_WRITE_DMA = 0xca,
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CMD_FLUSH_CACHE = 0xe7,
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CMD_IDENTIFY = 0xec,
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CMDF_ABORT = 0x100,
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CMDF_NO_BM = 0x200,
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};
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enum {
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BM_CMD_START = 0x1,
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BM_CMD_WRITE = 0x8, /* write = from device to memory */
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};
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enum {
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BM_STS_ACTIVE = 0x1,
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BM_STS_ERROR = 0x2,
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BM_STS_INTR = 0x4,
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};
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enum {
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PRDT_EOT = 0x80000000,
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};
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#define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
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#define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
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static QPCIBus *pcibus = NULL;
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static QGuestAllocator *guest_malloc;
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static char tmp_path[] = "/tmp/qtest.XXXXXX";
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static void ide_test_start(const char *cmdline_fmt, ...)
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{
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va_list ap;
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char *cmdline;
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va_start(ap, cmdline_fmt);
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cmdline = g_strdup_vprintf(cmdline_fmt, ap);
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va_end(ap);
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qtest_start(cmdline);
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qtest_irq_intercept_in(global_qtest, "ioapic");
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guest_malloc = pc_alloc_init();
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}
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static void ide_test_quit(void)
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{
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qtest_end();
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}
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static QPCIDevice *get_pci_device(uint16_t *bmdma_base)
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{
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QPCIDevice *dev;
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uint16_t vendor_id, device_id;
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if (!pcibus) {
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pcibus = qpci_init_pc();
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}
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/* Find PCI device and verify it's the right one */
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dev = qpci_device_find(pcibus, QPCI_DEVFN(IDE_PCI_DEV, IDE_PCI_FUNC));
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g_assert(dev != NULL);
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vendor_id = qpci_config_readw(dev, PCI_VENDOR_ID);
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device_id = qpci_config_readw(dev, PCI_DEVICE_ID);
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g_assert(vendor_id == PCI_VENDOR_ID_INTEL);
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g_assert(device_id == PCI_DEVICE_ID_INTEL_82371SB_1);
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/* Map bmdma BAR */
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*bmdma_base = (uint16_t)(uintptr_t) qpci_iomap(dev, 4);
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qpci_device_enable(dev);
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return dev;
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}
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static void free_pci_device(QPCIDevice *dev)
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{
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/* libqos doesn't have a function for this, so free it manually */
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g_free(dev);
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}
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typedef struct PrdtEntry {
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uint32_t addr;
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uint32_t size;
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} QEMU_PACKED PrdtEntry;
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#define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
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#define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
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static int send_dma_request(int cmd, uint64_t sector, int nb_sectors,
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PrdtEntry *prdt, int prdt_entries)
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{
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QPCIDevice *dev;
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uint16_t bmdma_base;
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uintptr_t guest_prdt;
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size_t len;
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bool from_dev;
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uint8_t status;
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int flags;
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dev = get_pci_device(&bmdma_base);
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flags = cmd & ~0xff;
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cmd &= 0xff;
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switch (cmd) {
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case CMD_READ_DMA:
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from_dev = true;
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break;
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case CMD_WRITE_DMA:
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from_dev = false;
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break;
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default:
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g_assert_not_reached();
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}
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if (flags & CMDF_NO_BM) {
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qpci_config_writew(dev, PCI_COMMAND,
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PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
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}
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/* Select device 0 */
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outb(IDE_BASE + reg_device, 0 | LBA);
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/* Stop any running transfer, clear any pending interrupt */
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outb(bmdma_base + bmreg_cmd, 0);
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outb(bmdma_base + bmreg_status, BM_STS_INTR);
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/* Setup PRDT */
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len = sizeof(*prdt) * prdt_entries;
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guest_prdt = guest_alloc(guest_malloc, len);
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memwrite(guest_prdt, prdt, len);
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outl(bmdma_base + bmreg_prdt, guest_prdt);
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/* ATA DMA command */
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outb(IDE_BASE + reg_nsectors, nb_sectors);
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outb(IDE_BASE + reg_lba_low, sector & 0xff);
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outb(IDE_BASE + reg_lba_middle, (sector >> 8) & 0xff);
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outb(IDE_BASE + reg_lba_high, (sector >> 16) & 0xff);
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outb(IDE_BASE + reg_command, cmd);
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/* Start DMA transfer */
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outb(bmdma_base + bmreg_cmd, BM_CMD_START | (from_dev ? BM_CMD_WRITE : 0));
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if (flags & CMDF_ABORT) {
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outb(bmdma_base + bmreg_cmd, 0);
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}
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/* Wait for the DMA transfer to complete */
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do {
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status = inb(bmdma_base + bmreg_status);
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} while ((status & (BM_STS_ACTIVE | BM_STS_INTR)) == BM_STS_ACTIVE);
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g_assert_cmpint(get_irq(IDE_PRIMARY_IRQ), ==, !!(status & BM_STS_INTR));
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/* Check IDE status code */
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assert_bit_set(inb(IDE_BASE + reg_status), DRDY);
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assert_bit_clear(inb(IDE_BASE + reg_status), BSY | DRQ);
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/* Reading the status register clears the IRQ */
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g_assert(!get_irq(IDE_PRIMARY_IRQ));
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/* Stop DMA transfer if still active */
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if (status & BM_STS_ACTIVE) {
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outb(bmdma_base + bmreg_cmd, 0);
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}
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free_pci_device(dev);
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return status;
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}
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static void test_bmdma_simple_rw(void)
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{
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uint8_t status;
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uint8_t *buf;
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uint8_t *cmpbuf;
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size_t len = 512;
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uintptr_t guest_buf = guest_alloc(guest_malloc, len);
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PrdtEntry prdt[] = {
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{
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.addr = cpu_to_le32(guest_buf),
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.size = cpu_to_le32(len | PRDT_EOT),
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},
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};
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buf = g_malloc(len);
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cmpbuf = g_malloc(len);
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/* Write 0x55 pattern to sector 0 */
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memset(buf, 0x55, len);
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memwrite(guest_buf, buf, len);
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status = send_dma_request(CMD_WRITE_DMA, 0, 1, prdt, ARRAY_SIZE(prdt));
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g_assert_cmphex(status, ==, BM_STS_INTR);
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assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
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/* Write 0xaa pattern to sector 1 */
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memset(buf, 0xaa, len);
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memwrite(guest_buf, buf, len);
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status = send_dma_request(CMD_WRITE_DMA, 1, 1, prdt, ARRAY_SIZE(prdt));
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g_assert_cmphex(status, ==, BM_STS_INTR);
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assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
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/* Read and verify 0x55 pattern in sector 0 */
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memset(cmpbuf, 0x55, len);
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status = send_dma_request(CMD_READ_DMA, 0, 1, prdt, ARRAY_SIZE(prdt));
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g_assert_cmphex(status, ==, BM_STS_INTR);
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assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
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memread(guest_buf, buf, len);
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g_assert(memcmp(buf, cmpbuf, len) == 0);
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/* Read and verify 0xaa pattern in sector 1 */
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memset(cmpbuf, 0xaa, len);
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status = send_dma_request(CMD_READ_DMA, 1, 1, prdt, ARRAY_SIZE(prdt));
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g_assert_cmphex(status, ==, BM_STS_INTR);
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assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
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memread(guest_buf, buf, len);
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g_assert(memcmp(buf, cmpbuf, len) == 0);
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g_free(buf);
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g_free(cmpbuf);
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}
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static void test_bmdma_short_prdt(void)
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{
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uint8_t status;
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PrdtEntry prdt[] = {
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{
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.addr = 0,
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.size = cpu_to_le32(0x10 | PRDT_EOT),
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},
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};
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/* Normal request */
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status = send_dma_request(CMD_READ_DMA, 0, 1,
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prdt, ARRAY_SIZE(prdt));
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g_assert_cmphex(status, ==, 0);
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assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
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/* Abort the request before it completes */
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status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 1,
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prdt, ARRAY_SIZE(prdt));
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g_assert_cmphex(status, ==, 0);
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assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
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}
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static void test_bmdma_long_prdt(void)
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{
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uint8_t status;
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PrdtEntry prdt[] = {
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{
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.addr = 0,
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.size = cpu_to_le32(0x1000 | PRDT_EOT),
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},
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};
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/* Normal request */
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status = send_dma_request(CMD_READ_DMA, 0, 1,
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prdt, ARRAY_SIZE(prdt));
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g_assert_cmphex(status, ==, BM_STS_ACTIVE | BM_STS_INTR);
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assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
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/* Abort the request before it completes */
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status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 1,
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prdt, ARRAY_SIZE(prdt));
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g_assert_cmphex(status, ==, BM_STS_INTR);
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assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
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}
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static void test_bmdma_no_busmaster(void)
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{
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uint8_t status;
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/* No PRDT_EOT, each entry addr 0/size 64k, and in theory qemu shouldn't be
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* able to access it anyway because the Bus Master bit in the PCI command
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* register isn't set. This is complete nonsense, but it used to be pretty
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* good at confusing and occasionally crashing qemu. */
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PrdtEntry prdt[4096] = { };
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status = send_dma_request(CMD_READ_DMA | CMDF_NO_BM, 0, 512,
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prdt, ARRAY_SIZE(prdt));
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/* Not entirely clear what the expected result is, but this is what we get
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* in practice. At least we want to be aware of any changes. */
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g_assert_cmphex(status, ==, BM_STS_ACTIVE | BM_STS_INTR);
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assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
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}
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static void test_bmdma_setup(void)
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{
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ide_test_start(
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"-drive file=%s,if=ide,serial=%s,cache=writeback "
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"-global ide-hd.ver=%s",
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tmp_path, "testdisk", "version");
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}
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static void test_bmdma_teardown(void)
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{
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ide_test_quit();
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}
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static void string_cpu_to_be16(uint16_t *s, size_t bytes)
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{
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g_assert((bytes & 1) == 0);
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bytes /= 2;
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while (bytes--) {
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*s = cpu_to_be16(*s);
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s++;
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}
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}
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static void test_identify(void)
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{
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uint8_t data;
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uint16_t buf[256];
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int i;
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int ret;
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ide_test_start(
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"-drive file=%s,if=ide,serial=%s,cache=writeback "
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"-global ide-hd.ver=%s",
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tmp_path, "testdisk", "version");
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/* IDENTIFY command on device 0*/
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outb(IDE_BASE + reg_device, 0);
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outb(IDE_BASE + reg_command, CMD_IDENTIFY);
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/* Read in the IDENTIFY buffer and check registers */
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data = inb(IDE_BASE + reg_device);
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g_assert_cmpint(data & DEV, ==, 0);
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for (i = 0; i < 256; i++) {
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data = inb(IDE_BASE + reg_status);
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assert_bit_set(data, DRDY | DRQ);
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assert_bit_clear(data, BSY | DF | ERR);
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((uint16_t*) buf)[i] = inw(IDE_BASE + reg_data);
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}
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data = inb(IDE_BASE + reg_status);
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assert_bit_set(data, DRDY);
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assert_bit_clear(data, BSY | DF | ERR | DRQ);
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/* Check serial number/version in the buffer */
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string_cpu_to_be16(&buf[10], 20);
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ret = memcmp(&buf[10], "testdisk ", 20);
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g_assert(ret == 0);
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string_cpu_to_be16(&buf[23], 8);
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ret = memcmp(&buf[23], "version ", 8);
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g_assert(ret == 0);
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/* Write cache enabled bit */
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assert_bit_set(buf[85], 0x20);
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ide_test_quit();
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}
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static void test_flush(void)
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{
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uint8_t data;
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ide_test_start(
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"-drive file=blkdebug::%s,if=ide,cache=writeback",
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tmp_path);
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/* Delay the completion of the flush request until we explicitly do it */
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qmp_discard_response("{'execute':'human-monitor-command', 'arguments': {"
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" 'command-line':"
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" 'qemu-io ide0-hd0 \"break flush_to_os A\"'} }");
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/* FLUSH CACHE command on device 0*/
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outb(IDE_BASE + reg_device, 0);
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outb(IDE_BASE + reg_command, CMD_FLUSH_CACHE);
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/* Check status while request is in flight*/
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data = inb(IDE_BASE + reg_status);
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assert_bit_set(data, BSY | DRDY);
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assert_bit_clear(data, DF | ERR | DRQ);
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/* Complete the command */
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qmp_discard_response("{'execute':'human-monitor-command', 'arguments': {"
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" 'command-line':"
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" 'qemu-io ide0-hd0 \"resume A\"'} }");
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/* Check registers */
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data = inb(IDE_BASE + reg_device);
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g_assert_cmpint(data & DEV, ==, 0);
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do {
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data = inb(IDE_BASE + reg_status);
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} while (data & BSY);
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assert_bit_set(data, DRDY);
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assert_bit_clear(data, BSY | DF | ERR | DRQ);
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ide_test_quit();
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}
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int main(int argc, char **argv)
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{
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const char *arch = qtest_get_arch();
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int fd;
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int ret;
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/* Check architecture */
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if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
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g_test_message("Skipping test for non-x86\n");
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return 0;
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}
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/* Create a temporary raw image */
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|
fd = mkstemp(tmp_path);
|
|
g_assert(fd >= 0);
|
|
ret = ftruncate(fd, TEST_IMAGE_SIZE);
|
|
g_assert(ret == 0);
|
|
close(fd);
|
|
|
|
/* Run the tests */
|
|
g_test_init(&argc, &argv, NULL);
|
|
|
|
qtest_add_func("/ide/identify", test_identify);
|
|
|
|
qtest_add_func("/ide/bmdma/setup", test_bmdma_setup);
|
|
qtest_add_func("/ide/bmdma/simple_rw", test_bmdma_simple_rw);
|
|
qtest_add_func("/ide/bmdma/short_prdt", test_bmdma_short_prdt);
|
|
qtest_add_func("/ide/bmdma/long_prdt", test_bmdma_long_prdt);
|
|
qtest_add_func("/ide/bmdma/no_busmaster", test_bmdma_no_busmaster);
|
|
qtest_add_func("/ide/bmdma/teardown", test_bmdma_teardown);
|
|
|
|
qtest_add_func("/ide/flush", test_flush);
|
|
|
|
ret = g_test_run();
|
|
|
|
/* Cleanup */
|
|
unlink(tmp_path);
|
|
|
|
return ret;
|
|
}
|