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https://github.com/xemu-project/xemu.git
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c5b703ac20
Previously all callers had a containing object with a destructor that could be used to trigger cleanup of the IORange objects (typically just freeing the containing object), but a forthcoming memory API change doesn't fit this pattern. Rather than setting up a new global table, extend the ioport system to support destructors. Signed-off-by: Avi Kivity <avi@redhat.com>
453 lines
13 KiB
C
453 lines
13 KiB
C
/*
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* QEMU System Emulator
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*
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* Copyright (c) 2003-2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/*
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* splitted out ioport related stuffs from vl.c.
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*/
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#include "ioport.h"
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#include "trace.h"
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#include "memory.h"
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/***********************************************************/
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/* IO Port */
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//#define DEBUG_UNUSED_IOPORT
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//#define DEBUG_IOPORT
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#ifdef DEBUG_UNUSED_IOPORT
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# define LOG_UNUSED_IOPORT(fmt, ...) fprintf(stderr, fmt, ## __VA_ARGS__)
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#else
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# define LOG_UNUSED_IOPORT(fmt, ...) do{ } while (0)
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#endif
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#ifdef DEBUG_IOPORT
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# define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
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#else
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# define LOG_IOPORT(...) do { } while (0)
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#endif
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/* XXX: use a two level table to limit memory usage */
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static void *ioport_opaque[MAX_IOPORTS];
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static IOPortReadFunc *ioport_read_table[3][MAX_IOPORTS];
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static IOPortWriteFunc *ioport_write_table[3][MAX_IOPORTS];
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static IOPortDestructor *ioport_destructor_table[MAX_IOPORTS];
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static IOPortReadFunc default_ioport_readb, default_ioport_readw, default_ioport_readl;
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static IOPortWriteFunc default_ioport_writeb, default_ioport_writew, default_ioport_writel;
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static uint32_t ioport_read(int index, uint32_t address)
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{
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static IOPortReadFunc * const default_func[3] = {
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default_ioport_readb,
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default_ioport_readw,
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default_ioport_readl
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};
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IOPortReadFunc *func = ioport_read_table[index][address];
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if (!func)
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func = default_func[index];
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return func(ioport_opaque[address], address);
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}
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static void ioport_write(int index, uint32_t address, uint32_t data)
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{
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static IOPortWriteFunc * const default_func[3] = {
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default_ioport_writeb,
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default_ioport_writew,
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default_ioport_writel
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};
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IOPortWriteFunc *func = ioport_write_table[index][address];
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if (!func)
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func = default_func[index];
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func(ioport_opaque[address], address, data);
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}
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static uint32_t default_ioport_readb(void *opaque, uint32_t address)
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{
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LOG_UNUSED_IOPORT("unused inb: port=0x%04"PRIx32"\n", address);
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return 0xff;
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}
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static void default_ioport_writeb(void *opaque, uint32_t address, uint32_t data)
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{
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LOG_UNUSED_IOPORT("unused outb: port=0x%04"PRIx32" data=0x%02"PRIx32"\n",
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address, data);
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}
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/* default is to make two byte accesses */
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static uint32_t default_ioport_readw(void *opaque, uint32_t address)
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{
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uint32_t data;
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data = ioport_read(0, address);
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address = (address + 1) & IOPORTS_MASK;
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data |= ioport_read(0, address) << 8;
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return data;
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}
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static void default_ioport_writew(void *opaque, uint32_t address, uint32_t data)
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{
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ioport_write(0, address, data & 0xff);
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address = (address + 1) & IOPORTS_MASK;
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ioport_write(0, address, (data >> 8) & 0xff);
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}
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static uint32_t default_ioport_readl(void *opaque, uint32_t address)
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{
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LOG_UNUSED_IOPORT("unused inl: port=0x%04"PRIx32"\n", address);
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return 0xffffffff;
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}
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static void default_ioport_writel(void *opaque, uint32_t address, uint32_t data)
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{
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LOG_UNUSED_IOPORT("unused outl: port=0x%04"PRIx32" data=0x%02"PRIx32"\n",
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address, data);
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}
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static int ioport_bsize(int size, int *bsize)
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{
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if (size == 1) {
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*bsize = 0;
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} else if (size == 2) {
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*bsize = 1;
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} else if (size == 4) {
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*bsize = 2;
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} else {
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return -1;
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}
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return 0;
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}
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/* size is the word size in byte */
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int register_ioport_read(pio_addr_t start, int length, int size,
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IOPortReadFunc *func, void *opaque)
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{
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int i, bsize;
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if (ioport_bsize(size, &bsize)) {
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hw_error("register_ioport_read: invalid size");
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return -1;
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}
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for(i = start; i < start + length; ++i) {
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ioport_read_table[bsize][i] = func;
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if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
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hw_error("register_ioport_read: invalid opaque for address 0x%x",
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i);
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ioport_opaque[i] = opaque;
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}
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return 0;
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}
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/* size is the word size in byte */
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int register_ioport_write(pio_addr_t start, int length, int size,
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IOPortWriteFunc *func, void *opaque)
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{
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int i, bsize;
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if (ioport_bsize(size, &bsize)) {
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hw_error("register_ioport_write: invalid size");
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return -1;
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}
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for(i = start; i < start + length; ++i) {
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ioport_write_table[bsize][i] = func;
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if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
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hw_error("register_ioport_write: invalid opaque for address 0x%x",
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i);
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ioport_opaque[i] = opaque;
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}
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return 0;
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}
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static uint32_t ioport_readb_thunk(void *opaque, uint32_t addr)
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{
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IORange *ioport = opaque;
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uint64_t data;
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ioport->ops->read(ioport, addr - ioport->base, 1, &data);
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return data;
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}
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static uint32_t ioport_readw_thunk(void *opaque, uint32_t addr)
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{
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IORange *ioport = opaque;
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uint64_t data;
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ioport->ops->read(ioport, addr - ioport->base, 2, &data);
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return data;
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}
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static uint32_t ioport_readl_thunk(void *opaque, uint32_t addr)
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{
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IORange *ioport = opaque;
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uint64_t data;
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ioport->ops->read(ioport, addr - ioport->base, 4, &data);
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return data;
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}
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static void ioport_writeb_thunk(void *opaque, uint32_t addr, uint32_t data)
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{
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IORange *ioport = opaque;
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ioport->ops->write(ioport, addr - ioport->base, 1, data);
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}
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static void ioport_writew_thunk(void *opaque, uint32_t addr, uint32_t data)
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{
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IORange *ioport = opaque;
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ioport->ops->write(ioport, addr - ioport->base, 2, data);
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}
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static void ioport_writel_thunk(void *opaque, uint32_t addr, uint32_t data)
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{
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IORange *ioport = opaque;
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ioport->ops->write(ioport, addr - ioport->base, 4, data);
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}
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static void iorange_destructor_thunk(void *opaque)
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{
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IORange *iorange = opaque;
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if (iorange->ops->destructor) {
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iorange->ops->destructor(iorange);
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}
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}
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void ioport_register(IORange *ioport)
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{
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register_ioport_read(ioport->base, ioport->len, 1,
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ioport_readb_thunk, ioport);
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register_ioport_read(ioport->base, ioport->len, 2,
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ioport_readw_thunk, ioport);
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register_ioport_read(ioport->base, ioport->len, 4,
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ioport_readl_thunk, ioport);
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register_ioport_write(ioport->base, ioport->len, 1,
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ioport_writeb_thunk, ioport);
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register_ioport_write(ioport->base, ioport->len, 2,
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ioport_writew_thunk, ioport);
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register_ioport_write(ioport->base, ioport->len, 4,
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ioport_writel_thunk, ioport);
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ioport_destructor_table[ioport->base] = iorange_destructor_thunk;
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}
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void isa_unassign_ioport(pio_addr_t start, int length)
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{
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int i;
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if (ioport_destructor_table[start]) {
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ioport_destructor_table[start](ioport_opaque[start]);
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ioport_destructor_table[start] = NULL;
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}
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for(i = start; i < start + length; i++) {
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ioport_read_table[0][i] = NULL;
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ioport_read_table[1][i] = NULL;
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ioport_read_table[2][i] = NULL;
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ioport_write_table[0][i] = NULL;
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ioport_write_table[1][i] = NULL;
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ioport_write_table[2][i] = NULL;
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ioport_opaque[i] = NULL;
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}
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}
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bool isa_is_ioport_assigned(pio_addr_t start)
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{
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return (ioport_read_table[0][start] || ioport_write_table[0][start] ||
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ioport_read_table[1][start] || ioport_write_table[1][start] ||
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ioport_read_table[2][start] || ioport_write_table[2][start]);
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}
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/***********************************************************/
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void cpu_outb(pio_addr_t addr, uint8_t val)
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{
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LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
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trace_cpu_out(addr, val);
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ioport_write(0, addr, val);
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}
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void cpu_outw(pio_addr_t addr, uint16_t val)
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{
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LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
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trace_cpu_out(addr, val);
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ioport_write(1, addr, val);
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}
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void cpu_outl(pio_addr_t addr, uint32_t val)
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{
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LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
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trace_cpu_out(addr, val);
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ioport_write(2, addr, val);
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}
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uint8_t cpu_inb(pio_addr_t addr)
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{
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uint8_t val;
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val = ioport_read(0, addr);
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trace_cpu_in(addr, val);
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LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
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return val;
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}
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uint16_t cpu_inw(pio_addr_t addr)
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{
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uint16_t val;
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val = ioport_read(1, addr);
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trace_cpu_in(addr, val);
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LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
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return val;
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}
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uint32_t cpu_inl(pio_addr_t addr)
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{
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uint32_t val;
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val = ioport_read(2, addr);
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trace_cpu_in(addr, val);
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LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
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return val;
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}
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void portio_list_init(PortioList *piolist,
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const MemoryRegionPortio *callbacks,
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void *opaque, const char *name)
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{
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unsigned n = 0;
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while (callbacks[n].size) {
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++n;
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}
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piolist->ports = callbacks;
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piolist->nr = 0;
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piolist->regions = g_new0(MemoryRegion *, n);
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piolist->aliases = g_new0(MemoryRegion *, n);
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piolist->address_space = NULL;
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piolist->opaque = opaque;
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piolist->name = name;
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}
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void portio_list_destroy(PortioList *piolist)
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{
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g_free(piolist->regions);
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g_free(piolist->aliases);
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}
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static void portio_list_add_1(PortioList *piolist,
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const MemoryRegionPortio *pio_init,
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unsigned count, unsigned start,
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unsigned off_low, unsigned off_high)
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{
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MemoryRegionPortio *pio;
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MemoryRegionOps *ops;
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MemoryRegion *region, *alias;
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unsigned i;
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/* Copy the sub-list and null-terminate it. */
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pio = g_new(MemoryRegionPortio, count + 1);
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memcpy(pio, pio_init, sizeof(MemoryRegionPortio) * count);
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memset(pio + count, 0, sizeof(MemoryRegionPortio));
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/* Adjust the offsets to all be zero-based for the region. */
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for (i = 0; i < count; ++i) {
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pio[i].offset -= off_low;
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}
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ops = g_new0(MemoryRegionOps, 1);
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ops->old_portio = pio;
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region = g_new(MemoryRegion, 1);
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alias = g_new(MemoryRegion, 1);
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/*
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* Use an alias so that the callback is called with an absolute address,
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* rather than an offset relative to to start + off_low.
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*/
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memory_region_init_io(region, ops, piolist->opaque, piolist->name,
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UINT64_MAX);
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memory_region_init_alias(alias, piolist->name,
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region, start + off_low, off_high - off_low);
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memory_region_add_subregion(piolist->address_space,
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start + off_low, alias);
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piolist->regions[piolist->nr] = region;
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piolist->aliases[piolist->nr] = alias;
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++piolist->nr;
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}
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void portio_list_add(PortioList *piolist,
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MemoryRegion *address_space,
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uint32_t start)
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{
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const MemoryRegionPortio *pio, *pio_start = piolist->ports;
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unsigned int off_low, off_high, off_last, count;
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piolist->address_space = address_space;
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/* Handle the first entry specially. */
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off_last = off_low = pio_start->offset;
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off_high = off_low + pio_start->len;
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count = 1;
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for (pio = pio_start + 1; pio->size != 0; pio++, count++) {
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/* All entries must be sorted by offset. */
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assert(pio->offset >= off_last);
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off_last = pio->offset;
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/* If we see a hole, break the region. */
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if (off_last > off_high) {
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portio_list_add_1(piolist, pio_start, count, start, off_low,
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off_high);
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/* ... and start collecting anew. */
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pio_start = pio;
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off_low = off_last;
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off_high = off_low + pio->len;
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count = 0;
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} else if (off_last + pio->len > off_high) {
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off_high = off_last + pio->len;
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}
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}
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/* There will always be an open sub-list. */
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portio_list_add_1(piolist, pio_start, count, start, off_low, off_high);
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}
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void portio_list_del(PortioList *piolist)
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{
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MemoryRegion *mr, *alias;
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unsigned i;
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for (i = 0; i < piolist->nr; ++i) {
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mr = piolist->regions[i];
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alias = piolist->aliases[i];
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memory_region_del_subregion(piolist->address_space, alias);
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memory_region_destroy(alias);
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memory_region_destroy(mr);
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g_free((MemoryRegionOps *)mr->ops);
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g_free(mr);
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g_free(alias);
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piolist->regions[i] = NULL;
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piolist->aliases[i] = NULL;
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}
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}
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