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4f5e19e6c5
split static functions in pci_host.h into pci_host.c and pci_host_template.h. Later a structures declared in pci_host.h, PCIHostState, will be used. However pci_host.h doesn't allow to include itself easily. This patches addresses it. pci_host.h includes functions which are instantiated in .c by including pci_host.h with typedefing pci_addr_t. pci_addr_t is per pci host bridge and is typedef'ed to uint32_t for ioio or target_phys_addr_t for mmio in .c file. That prevents from including pci_host.h to use PCIHostState because of requiring type, pci_addr_t. Its purpose to include is to instantiate io function for mmio or ioio depending on which pci host bridge requires ioio or mmio. To avoid including code, we always instantiate both version. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
110 lines
3.7 KiB
C
110 lines
3.7 KiB
C
/*
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* QEMU Common PCI Host bridge configuration data space access routines.
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*
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* Copyright (c) 2006 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/* Worker routines for a PCI host controller that uses an {address,data}
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register pair to access PCI configuration space. */
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static void glue(pci_host_data_writeb, PCI_HOST_SUFFIX)(
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void* opaque, PCI_ADDR_T addr, uint32_t val)
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{
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PCIHostState *s = opaque;
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PCI_DPRINTF("writeb addr " TARGET_FMT_plx " val %x\n",
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(target_phys_addr_t)addr, val);
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if (s->config_reg & (1u << 31))
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pci_data_write(s->bus, s->config_reg | (addr & 3), val, 1);
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}
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static void glue(pci_host_data_writew, PCI_HOST_SUFFIX)(
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void* opaque, PCI_ADDR_T addr, uint32_t val)
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{
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PCIHostState *s = opaque;
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap16(val);
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#endif
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PCI_DPRINTF("writew addr " TARGET_FMT_plx " val %x\n",
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(target_phys_addr_t)addr, val);
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if (s->config_reg & (1u << 31))
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pci_data_write(s->bus, s->config_reg | (addr & 3), val, 2);
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}
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static void glue(pci_host_data_writel, PCI_HOST_SUFFIX)(
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void* opaque, PCI_ADDR_T addr, uint32_t val)
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{
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PCIHostState *s = opaque;
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap32(val);
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#endif
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PCI_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n",
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(target_phys_addr_t)addr, val);
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if (s->config_reg & (1u << 31))
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pci_data_write(s->bus, s->config_reg, val, 4);
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}
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static uint32_t glue(pci_host_data_readb, PCI_HOST_SUFFIX)(
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void* opaque, PCI_ADDR_T addr)
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{
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PCIHostState *s = opaque;
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uint32_t val;
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if (!(s->config_reg & (1 << 31)))
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return 0xff;
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val = pci_data_read(s->bus, s->config_reg | (addr & 3), 1);
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PCI_DPRINTF("readb addr " TARGET_FMT_plx " val %x\n",
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(target_phys_addr_t)addr, val);
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return val;
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}
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static uint32_t glue(pci_host_data_readw, PCI_HOST_SUFFIX)(
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void* opaque, PCI_ADDR_T addr)
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{
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PCIHostState *s = opaque;
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uint32_t val;
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if (!(s->config_reg & (1 << 31)))
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return 0xffff;
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val = pci_data_read(s->bus, s->config_reg | (addr & 3), 2);
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PCI_DPRINTF("readw addr " TARGET_FMT_plx " val %x\n",
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(target_phys_addr_t)addr, val);
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap16(val);
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#endif
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return val;
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}
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static uint32_t glue(pci_host_data_readl, PCI_HOST_SUFFIX)(
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void* opaque, PCI_ADDR_T addr)
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{
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PCIHostState *s = opaque;
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uint32_t val;
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if (!(s->config_reg & (1 << 31)))
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return 0xffffffff;
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val = pci_data_read(s->bus, s->config_reg | (addr & 3), 4);
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PCI_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n",
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(target_phys_addr_t)addr, val);
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap32(val);
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#endif
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return val;
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}
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