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70cc0c1fb0
Move the complexity of milkymist_tmu2_create() into the source file. Doing so we avoid to include the X11/OpenGL headers in all LM32 devices, and we also avoid the duplicate declaration of glx_fbconfig_attr[] (it is already declared in hw/display/milkymist-tmu2.c). Since TYPE_MILKYMIST_TMU2 is now accessible, use it. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190130120005.23123-5-philmd@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
144 lines
4.2 KiB
C
144 lines
4.2 KiB
C
#ifndef QEMU_HW_MILKYMIST_HW_H
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#define QEMU_HW_MILKYMIST_HW_H
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#include "hw/qdev.h"
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#include "net/net.h"
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static inline DeviceState *milkymist_uart_create(hwaddr base,
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qemu_irq irq,
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Chardev *chr)
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{
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DeviceState *dev;
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dev = qdev_create(NULL, "milkymist-uart");
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qdev_prop_set_chr(dev, "chardev", chr);
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
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return dev;
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}
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static inline DeviceState *milkymist_hpdmc_create(hwaddr base)
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{
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DeviceState *dev;
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dev = qdev_create(NULL, "milkymist-hpdmc");
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
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return dev;
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}
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static inline DeviceState *milkymist_memcard_create(hwaddr base)
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{
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DeviceState *dev;
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dev = qdev_create(NULL, "milkymist-memcard");
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
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return dev;
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}
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static inline DeviceState *milkymist_vgafb_create(hwaddr base,
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uint32_t fb_offset, uint32_t fb_mask)
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{
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DeviceState *dev;
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dev = qdev_create(NULL, "milkymist-vgafb");
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qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
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qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
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return dev;
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}
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static inline DeviceState *milkymist_sysctl_create(hwaddr base,
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qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq,
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uint32_t freq_hz, uint32_t system_id, uint32_t capabilities,
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uint32_t gpio_strappings)
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{
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DeviceState *dev;
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dev = qdev_create(NULL, "milkymist-sysctl");
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qdev_prop_set_uint32(dev, "frequency", freq_hz);
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qdev_prop_set_uint32(dev, "systemid", system_id);
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qdev_prop_set_uint32(dev, "capabilities", capabilities);
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qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, timer1_irq);
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return dev;
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}
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static inline DeviceState *milkymist_pfpu_create(hwaddr base,
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qemu_irq irq)
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{
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DeviceState *dev;
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dev = qdev_create(NULL, "milkymist-pfpu");
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
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return dev;
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}
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static inline DeviceState *milkymist_ac97_create(hwaddr base,
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qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq,
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qemu_irq dmaw_irq)
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{
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DeviceState *dev;
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dev = qdev_create(NULL, "milkymist-ac97");
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, dmar_irq);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 3, dmaw_irq);
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return dev;
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}
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static inline DeviceState *milkymist_minimac2_create(hwaddr base,
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hwaddr buffers_base, qemu_irq rx_irq, qemu_irq tx_irq)
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{
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DeviceState *dev;
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qemu_check_nic_model(&nd_table[0], "minimac2");
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dev = qdev_create(NULL, "milkymist-minimac2");
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qdev_set_nic_properties(dev, &nd_table[0]);
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq);
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return dev;
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}
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static inline DeviceState *milkymist_softusb_create(hwaddr base,
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qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size,
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uint32_t dmem_base, uint32_t dmem_size)
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{
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DeviceState *dev;
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dev = qdev_create(NULL, "milkymist-softusb");
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qdev_prop_set_uint32(dev, "pmem_size", pmem_size);
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qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
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return dev;
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}
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#endif /* QEMU_HW_MILKYMIST_HW_H */
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