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4b6a83fb0c
Initial infrastructure for data-driven registration of coprocessor register implementations. We still fall back to the old-style switch statements pending complete conversion of all existing registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
467 lines
10 KiB
C
467 lines
10 KiB
C
/*
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* ARM helper routines
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*
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* Copyright (c) 2005-2007 CodeSourcery, LLC
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h"
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#include "dyngen-exec.h"
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#include "helper.h"
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#define SIGNBIT (uint32_t)0x80000000
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#define SIGNBIT64 ((uint64_t)1 << 63)
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static void raise_exception(int tt)
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{
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env->exception_index = tt;
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cpu_loop_exit(env);
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}
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uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def,
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uint32_t rn, uint32_t maxindex)
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{
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uint32_t val;
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uint32_t tmp;
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int index;
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int shift;
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uint64_t *table;
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table = (uint64_t *)&env->vfp.regs[rn];
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val = 0;
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for (shift = 0; shift < 32; shift += 8) {
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index = (ireg >> shift) & 0xff;
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if (index < maxindex) {
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tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
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val |= tmp << shift;
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} else {
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val |= def & (0xff << shift);
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}
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}
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return val;
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}
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#if !defined(CONFIG_USER_ONLY)
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#include "softmmu_exec.h"
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#define MMUSUFFIX _mmu
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#define SHIFT 0
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#include "softmmu_template.h"
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#define SHIFT 1
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#include "softmmu_template.h"
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#define SHIFT 2
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#include "softmmu_template.h"
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#define SHIFT 3
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#include "softmmu_template.h"
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/* try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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/* XXX: fix it to restore all registers */
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void tlb_fill(CPUARMState *env1, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr)
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{
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TranslationBlock *tb;
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CPUARMState *saved_env;
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int ret;
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saved_env = env;
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env = env1;
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ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx);
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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tb = tb_find_pc(retaddr);
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if (tb) {
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/* the PC is inside the translated code. It means that we have
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a virtual CPU fault */
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cpu_restore_state(tb, env, retaddr);
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}
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}
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raise_exception(env->exception_index);
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}
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env = saved_env;
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}
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#endif
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/* FIXME: Pass an axplicit pointer to QF to CPUARMState, and move saturating
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instructions into helper.c */
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uint32_t HELPER(add_setq)(uint32_t a, uint32_t b)
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{
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uint32_t res = a + b;
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if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT))
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env->QF = 1;
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return res;
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}
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uint32_t HELPER(add_saturate)(uint32_t a, uint32_t b)
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{
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uint32_t res = a + b;
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if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT)) {
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env->QF = 1;
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res = ~(((int32_t)a >> 31) ^ SIGNBIT);
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}
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return res;
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}
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uint32_t HELPER(sub_saturate)(uint32_t a, uint32_t b)
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{
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uint32_t res = a - b;
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if (((res ^ a) & SIGNBIT) && ((a ^ b) & SIGNBIT)) {
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env->QF = 1;
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res = ~(((int32_t)a >> 31) ^ SIGNBIT);
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}
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return res;
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}
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uint32_t HELPER(double_saturate)(int32_t val)
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{
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uint32_t res;
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if (val >= 0x40000000) {
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res = ~SIGNBIT;
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env->QF = 1;
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} else if (val <= (int32_t)0xc0000000) {
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res = SIGNBIT;
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env->QF = 1;
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} else {
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res = val << 1;
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}
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return res;
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}
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uint32_t HELPER(add_usaturate)(uint32_t a, uint32_t b)
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{
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uint32_t res = a + b;
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if (res < a) {
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env->QF = 1;
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res = ~0;
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}
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return res;
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}
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uint32_t HELPER(sub_usaturate)(uint32_t a, uint32_t b)
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{
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uint32_t res = a - b;
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if (res > a) {
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env->QF = 1;
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res = 0;
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}
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return res;
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}
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/* Signed saturation. */
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static inline uint32_t do_ssat(int32_t val, int shift)
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{
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int32_t top;
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uint32_t mask;
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top = val >> shift;
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mask = (1u << shift) - 1;
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if (top > 0) {
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env->QF = 1;
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return mask;
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} else if (top < -1) {
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env->QF = 1;
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return ~mask;
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}
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return val;
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}
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/* Unsigned saturation. */
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static inline uint32_t do_usat(int32_t val, int shift)
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{
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uint32_t max;
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max = (1u << shift) - 1;
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if (val < 0) {
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env->QF = 1;
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return 0;
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} else if (val > max) {
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env->QF = 1;
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return max;
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}
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return val;
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}
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/* Signed saturate. */
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uint32_t HELPER(ssat)(uint32_t x, uint32_t shift)
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{
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return do_ssat(x, shift);
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}
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/* Dual halfword signed saturate. */
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uint32_t HELPER(ssat16)(uint32_t x, uint32_t shift)
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{
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uint32_t res;
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res = (uint16_t)do_ssat((int16_t)x, shift);
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res |= do_ssat(((int32_t)x) >> 16, shift) << 16;
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return res;
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}
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/* Unsigned saturate. */
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uint32_t HELPER(usat)(uint32_t x, uint32_t shift)
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{
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return do_usat(x, shift);
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}
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/* Dual halfword unsigned saturate. */
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uint32_t HELPER(usat16)(uint32_t x, uint32_t shift)
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{
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uint32_t res;
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res = (uint16_t)do_usat((int16_t)x, shift);
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res |= do_usat(((int32_t)x) >> 16, shift) << 16;
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return res;
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}
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void HELPER(wfi)(void)
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{
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env->exception_index = EXCP_HLT;
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env->halted = 1;
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cpu_loop_exit(env);
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}
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void HELPER(exception)(uint32_t excp)
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{
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env->exception_index = excp;
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cpu_loop_exit(env);
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}
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uint32_t HELPER(cpsr_read)(void)
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{
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return cpsr_read(env) & ~CPSR_EXEC;
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}
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void HELPER(cpsr_write)(uint32_t val, uint32_t mask)
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{
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cpsr_write(env, val, mask);
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}
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/* Access to user mode registers from privileged modes. */
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uint32_t HELPER(get_user_reg)(uint32_t regno)
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{
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uint32_t val;
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if (regno == 13) {
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val = env->banked_r13[0];
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} else if (regno == 14) {
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val = env->banked_r14[0];
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} else if (regno >= 8
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&& (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
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val = env->usr_regs[regno - 8];
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} else {
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val = env->regs[regno];
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}
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return val;
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}
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void HELPER(set_user_reg)(uint32_t regno, uint32_t val)
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{
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if (regno == 13) {
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env->banked_r13[0] = val;
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} else if (regno == 14) {
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env->banked_r14[0] = val;
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} else if (regno >= 8
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&& (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
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env->usr_regs[regno - 8] = val;
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} else {
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env->regs[regno] = val;
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}
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}
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void HELPER(set_cp_reg)(CPUARMState *env, void *rip, uint32_t value)
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{
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const ARMCPRegInfo *ri = rip;
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int excp = ri->writefn(env, ri, value);
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if (excp) {
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raise_exception(excp);
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}
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}
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uint32_t HELPER(get_cp_reg)(CPUARMState *env, void *rip)
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{
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const ARMCPRegInfo *ri = rip;
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uint64_t value;
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int excp = ri->readfn(env, ri, &value);
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if (excp) {
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raise_exception(excp);
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}
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return value;
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}
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void HELPER(set_cp_reg64)(CPUARMState *env, void *rip, uint64_t value)
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{
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const ARMCPRegInfo *ri = rip;
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int excp = ri->writefn(env, ri, value);
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if (excp) {
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raise_exception(excp);
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}
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}
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uint64_t HELPER(get_cp_reg64)(CPUARMState *env, void *rip)
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{
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const ARMCPRegInfo *ri = rip;
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uint64_t value;
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int excp = ri->readfn(env, ri, &value);
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if (excp) {
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raise_exception(excp);
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}
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return value;
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}
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/* ??? Flag setting arithmetic is awkward because we need to do comparisons.
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The only way to do that in TCG is a conditional branch, which clobbers
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all our temporaries. For now implement these as helper functions. */
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uint32_t HELPER (add_cc)(uint32_t a, uint32_t b)
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{
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uint32_t result;
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result = a + b;
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env->NF = env->ZF = result;
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env->CF = result < a;
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env->VF = (a ^ b ^ -1) & (a ^ result);
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return result;
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}
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uint32_t HELPER(adc_cc)(uint32_t a, uint32_t b)
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{
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uint32_t result;
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if (!env->CF) {
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result = a + b;
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env->CF = result < a;
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} else {
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result = a + b + 1;
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env->CF = result <= a;
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}
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env->VF = (a ^ b ^ -1) & (a ^ result);
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env->NF = env->ZF = result;
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return result;
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}
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uint32_t HELPER(sub_cc)(uint32_t a, uint32_t b)
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{
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uint32_t result;
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result = a - b;
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env->NF = env->ZF = result;
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env->CF = a >= b;
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env->VF = (a ^ b) & (a ^ result);
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return result;
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}
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uint32_t HELPER(sbc_cc)(uint32_t a, uint32_t b)
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{
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uint32_t result;
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if (!env->CF) {
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result = a - b - 1;
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env->CF = a > b;
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} else {
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result = a - b;
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env->CF = a >= b;
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}
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env->VF = (a ^ b) & (a ^ result);
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env->NF = env->ZF = result;
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return result;
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}
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/* Similarly for variable shift instructions. */
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uint32_t HELPER(shl)(uint32_t x, uint32_t i)
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{
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int shift = i & 0xff;
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if (shift >= 32)
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return 0;
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return x << shift;
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}
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uint32_t HELPER(shr)(uint32_t x, uint32_t i)
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{
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int shift = i & 0xff;
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if (shift >= 32)
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return 0;
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return (uint32_t)x >> shift;
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}
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uint32_t HELPER(sar)(uint32_t x, uint32_t i)
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{
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int shift = i & 0xff;
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if (shift >= 32)
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shift = 31;
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return (int32_t)x >> shift;
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}
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uint32_t HELPER(shl_cc)(uint32_t x, uint32_t i)
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{
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int shift = i & 0xff;
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if (shift >= 32) {
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if (shift == 32)
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env->CF = x & 1;
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else
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env->CF = 0;
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return 0;
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} else if (shift != 0) {
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env->CF = (x >> (32 - shift)) & 1;
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return x << shift;
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}
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return x;
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}
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uint32_t HELPER(shr_cc)(uint32_t x, uint32_t i)
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{
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int shift = i & 0xff;
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if (shift >= 32) {
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if (shift == 32)
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env->CF = (x >> 31) & 1;
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else
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env->CF = 0;
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return 0;
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} else if (shift != 0) {
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env->CF = (x >> (shift - 1)) & 1;
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return x >> shift;
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}
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return x;
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}
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uint32_t HELPER(sar_cc)(uint32_t x, uint32_t i)
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{
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int shift = i & 0xff;
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if (shift >= 32) {
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env->CF = (x >> 31) & 1;
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return (int32_t)x >> 31;
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} else if (shift != 0) {
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env->CF = (x >> (shift - 1)) & 1;
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return (int32_t)x >> shift;
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}
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return x;
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}
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uint32_t HELPER(ror_cc)(uint32_t x, uint32_t i)
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{
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int shift1, shift;
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shift1 = i & 0xff;
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shift = shift1 & 0x1f;
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if (shift == 0) {
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if (shift1 != 0)
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env->CF = (x >> 31) & 1;
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return x;
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} else {
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env->CF = (x >> (shift - 1)) & 1;
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return ((uint32_t)x >> shift) | (x << (32 - shift));
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}
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}
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