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3cbee15b9a
* make PowerPC NVRAM accessors generic to be able to use a MacIO NVRAM instead of the M48T59 one * split PowerMac targets code: - move all PowerMac related definitions and prototypes into hw/ppc_mac.h - add hw/mac_dbdma.c, hw/mac_nvram.c and macio.c which implements shared PowerMac devices - define the g3bw machine in a new hw/ppc_oldworld.c file * Fix the g3bw target: - fix the Grackle host PCI device - connect the Heathrow PIC to the PowerPC 6xx bus pins git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3475 c046a42c-6fe2-441c-8c8c-71466251a162
80 lines
2.3 KiB
C
80 lines
2.3 KiB
C
/*
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* PowerMac descriptor-based DMA emulation
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*
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* Copyright (c) 2005-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h"
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#include "ppc_mac.h"
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/* DBDMA: currently no op - should suffice right now */
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static void dbdma_writeb (void *opaque,
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target_phys_addr_t addr, uint32_t value)
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{
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printf("%s: 0x" PADDRX " <= 0x%08x\n", __func__, addr, value);
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}
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static void dbdma_writew (void *opaque,
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target_phys_addr_t addr, uint32_t value)
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{
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}
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static void dbdma_writel (void *opaque,
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target_phys_addr_t addr, uint32_t value)
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{
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}
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static uint32_t dbdma_readb (void *opaque, target_phys_addr_t addr)
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{
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printf("%s: 0x" PADDRX " => 0x00000000\n", __func__, addr);
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return 0;
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}
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static uint32_t dbdma_readw (void *opaque, target_phys_addr_t addr)
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{
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return 0;
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}
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static uint32_t dbdma_readl (void *opaque, target_phys_addr_t addr)
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{
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return 0;
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}
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static CPUWriteMemoryFunc *dbdma_write[] = {
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&dbdma_writeb,
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&dbdma_writew,
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&dbdma_writel,
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};
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static CPUReadMemoryFunc *dbdma_read[] = {
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&dbdma_readb,
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&dbdma_readw,
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&dbdma_readl,
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};
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void dbdma_init (int *dbdma_mem_index)
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{
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*dbdma_mem_index = cpu_register_io_memory(0, dbdma_read, dbdma_write, NULL);
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}
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