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Rdd32 = add(Rss32, Rtt32, Px4):carry Add with carry Rdd32 = sub(Rss32, Rtt32, Px4):carry Sub with carry Test cases in tests/tcg/hexagon/multi_result.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-22-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
283 lines
7.2 KiB
C
283 lines
7.2 KiB
C
/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdio.h>
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static int sfrecipa(int Rs, int Rt, int *pred_result)
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{
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int result;
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int predval;
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asm volatile("%0,p0 = sfrecipa(%2, %3)\n\t"
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"%1 = p0\n\t"
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: "+r"(result), "=r"(predval)
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: "r"(Rs), "r"(Rt)
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: "p0");
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*pred_result = predval;
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return result;
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}
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static int sfinvsqrta(int Rs, int *pred_result)
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{
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int result;
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int predval;
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asm volatile("%0,p0 = sfinvsqrta(%2)\n\t"
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"%1 = p0\n\t"
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: "+r"(result), "=r"(predval)
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: "r"(Rs)
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: "p0");
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*pred_result = predval;
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return result;
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}
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static long long vacsh(long long Rxx, long long Rss, long long Rtt,
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int *pred_result, int *ovf_result)
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{
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long long result = Rxx;
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int predval;
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int usr;
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/*
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* This instruction can set bit 0 (OVF/overflow) in usr
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* Clear the bit first, then return that bit to the caller
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*/
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asm volatile("r2 = usr\n\t"
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"r2 = clrbit(r2, #0)\n\t" /* clear overflow bit */
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"usr = r2\n\t"
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"%0,p0 = vacsh(%3, %4)\n\t"
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"%1 = p0\n\t"
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"%2 = usr\n\t"
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: "+r"(result), "=r"(predval), "=r"(usr)
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: "r"(Rss), "r"(Rtt)
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: "r2", "p0", "usr");
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*pred_result = predval;
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*ovf_result = (usr & 1);
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return result;
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}
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static long long vminub(long long Rtt, long long Rss,
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int *pred_result)
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{
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long long result;
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int predval;
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asm volatile("%0,p0 = vminub(%2, %3)\n\t"
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"%1 = p0\n\t"
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: "=r"(result), "=r"(predval)
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: "r"(Rtt), "r"(Rss)
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: "p0");
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*pred_result = predval;
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return result;
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}
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static long long add_carry(long long Rss, long long Rtt,
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int pred_in, int *pred_result)
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{
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long long result;
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int predval = pred_in;
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asm volatile("p0 = %1\n\t"
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"%0 = add(%2, %3, p0):carry\n\t"
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"%1 = p0\n\t"
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: "=r"(result), "+r"(predval)
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: "r"(Rss), "r"(Rtt)
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: "p0");
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*pred_result = predval;
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return result;
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}
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static long long sub_carry(long long Rss, long long Rtt,
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int pred_in, int *pred_result)
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{
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long long result;
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int predval = pred_in;
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asm volatile("p0 = !cmp.eq(%1, #0)\n\t"
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"%0 = sub(%2, %3, p0):carry\n\t"
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"%1 = p0\n\t"
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: "=r"(result), "+r"(predval)
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: "r"(Rss), "r"(Rtt)
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: "p0");
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*pred_result = predval;
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return result;
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}
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int err;
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static void check_ll(long long val, long long expect)
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{
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if (val != expect) {
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printf("ERROR: 0x%016llx != 0x%016llx\n", val, expect);
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err++;
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}
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}
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static void check(int val, int expect)
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{
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if (val != expect) {
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printf("ERROR: 0x%08x != 0x%08x\n", val, expect);
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err++;
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}
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}
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static void check_p(int val, int expect)
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{
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if (val != expect) {
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printf("ERROR: 0x%02x != 0x%02x\n", val, expect);
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err++;
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}
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}
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static void test_sfrecipa()
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{
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int res;
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int pred_result;
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res = sfrecipa(0x04030201, 0x05060708, &pred_result);
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check(res, 0x59f38001);
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check_p(pred_result, 0x00);
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}
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static void test_sfinvsqrta()
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{
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int res;
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int pred_result;
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res = sfinvsqrta(0x04030201, &pred_result);
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check(res, 0x4d330000);
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check_p(pred_result, 0xe0);
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res = sfinvsqrta(0x0, &pred_result);
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check(res, 0x3f800000);
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check_p(pred_result, 0x0);
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}
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static void test_vacsh()
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{
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long long res64;
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int pred_result;
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int ovf_result;
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res64 = vacsh(0x0004000300020001LL,
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0x0001000200030004LL,
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0x0000000000000000LL, &pred_result, &ovf_result);
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check_ll(res64, 0x0004000300030004LL);
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check_p(pred_result, 0xf0);
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check(ovf_result, 0);
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res64 = vacsh(0x0004000300020001LL,
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0x0001000200030004LL,
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0x000affff000d0000LL, &pred_result, &ovf_result);
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check_ll(res64, 0x000e0003000f0004LL);
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check_p(pred_result, 0xcc);
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check(ovf_result, 0);
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res64 = vacsh(0x00047fff00020001LL,
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0x00017fff00030004LL,
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0x000a0fff000d0000LL, &pred_result, &ovf_result);
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check_ll(res64, 0x000e7fff000f0004LL);
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check_p(pred_result, 0xfc);
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check(ovf_result, 1);
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res64 = vacsh(0x0004000300020001LL,
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0x0001000200030009LL,
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0x000affff000d0001LL, &pred_result, &ovf_result);
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check_ll(res64, 0x000e0003000f0008LL);
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check_p(pred_result, 0xcc);
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check(ovf_result, 0);
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}
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static void test_vminub()
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{
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long long res64;
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int pred_result;
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res64 = vminub(0x0807060504030201LL,
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0x0102030405060708LL,
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&pred_result);
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check_ll(res64, 0x0102030404030201LL);
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check_p(pred_result, 0xf0);
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res64 = vminub(0x0802060405030701LL,
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0x0107030504060208LL,
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&pred_result);
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check_ll(res64, 0x0102030404030201LL);
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check_p(pred_result, 0xaa);
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}
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static void test_add_carry()
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{
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long long res64;
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int pred_result;
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res64 = add_carry(0x0000000000000000LL,
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0xffffffffffffffffLL,
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1, &pred_result);
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check_ll(res64, 0x0000000000000000LL);
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check_p(pred_result, 0xff);
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res64 = add_carry(0x0000000100000000LL,
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0xffffffffffffffffLL,
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0, &pred_result);
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check_ll(res64, 0x00000000ffffffffLL);
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check_p(pred_result, 0xff);
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res64 = add_carry(0x0000000100000000LL,
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0xffffffffffffffffLL,
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0, &pred_result);
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check_ll(res64, 0x00000000ffffffffLL);
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check_p(pred_result, 0xff);
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}
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static void test_sub_carry()
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{
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long long res64;
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int pred_result;
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res64 = sub_carry(0x0000000000000000LL,
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0x0000000000000000LL,
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1, &pred_result);
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check_ll(res64, 0x0000000000000000LL);
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check_p(pred_result, 0xff);
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res64 = sub_carry(0x0000000100000000LL,
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0x0000000000000000LL,
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0, &pred_result);
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check_ll(res64, 0x00000000ffffffffLL);
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check_p(pred_result, 0xff);
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res64 = sub_carry(0x0000000100000000LL,
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0x0000000000000000LL,
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0, &pred_result);
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check_ll(res64, 0x00000000ffffffffLL);
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check_p(pred_result, 0xff);
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}
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int main()
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{
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test_sfrecipa();
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test_sfinvsqrta();
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test_vacsh();
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test_vminub();
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test_add_carry();
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test_sub_carry();
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puts(err ? "FAIL" : "PASS");
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return err;
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}
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