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2d0e9143e2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@217 c046a42c-6fe2-441c-8c8c-71466251a162
886 lines
21 KiB
C
886 lines
21 KiB
C
/*
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* i386 helpers
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec-i386.h"
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const CPU86_LDouble f15rk[7] =
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{
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0.00000000000000000000L,
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1.00000000000000000000L,
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3.14159265358979323851L, /*pi*/
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0.30102999566398119523L, /*lg2*/
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0.69314718055994530943L, /*ln2*/
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1.44269504088896340739L, /*l2e*/
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3.32192809488736234781L, /*l2t*/
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};
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/* thread support */
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spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
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void cpu_lock(void)
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{
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spin_lock(&global_cpu_lock);
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}
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void cpu_unlock(void)
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{
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spin_unlock(&global_cpu_lock);
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}
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void cpu_loop_exit(void)
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{
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/* NOTE: the register at this point must be saved by hand because
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longjmp restore them */
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#ifdef reg_EAX
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env->regs[R_EAX] = EAX;
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#endif
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#ifdef reg_ECX
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env->regs[R_ECX] = ECX;
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#endif
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#ifdef reg_EDX
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env->regs[R_EDX] = EDX;
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#endif
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#ifdef reg_EBX
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env->regs[R_EBX] = EBX;
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#endif
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#ifdef reg_ESP
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env->regs[R_ESP] = ESP;
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#endif
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#ifdef reg_EBP
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env->regs[R_EBP] = EBP;
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#endif
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#ifdef reg_ESI
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env->regs[R_ESI] = ESI;
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#endif
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#ifdef reg_EDI
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env->regs[R_EDI] = EDI;
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#endif
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longjmp(env->jmp_env, 1);
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}
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#if 0
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/* full interrupt support (only useful for real CPU emulation, not
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finished) - I won't do it any time soon, finish it if you want ! */
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void raise_interrupt(int intno, int is_int, int error_code,
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unsigned int next_eip)
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{
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SegmentDescriptorTable *dt;
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uint8_t *ptr;
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int type, dpl, cpl;
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uint32_t e1, e2;
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dt = &env->idt;
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if (intno * 8 + 7 > dt->limit)
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raise_exception_err(EXCP0D_GPF, intno * 8 + 2);
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ptr = dt->base + intno * 8;
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e1 = ldl(ptr);
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e2 = ldl(ptr + 4);
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/* check gate type */
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type = (e2 >> DESC_TYPE_SHIFT) & 0x1f;
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switch(type) {
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case 5: /* task gate */
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case 6: /* 286 interrupt gate */
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case 7: /* 286 trap gate */
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case 14: /* 386 interrupt gate */
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case 15: /* 386 trap gate */
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break;
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default:
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raise_exception_err(EXCP0D_GPF, intno * 8 + 2);
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break;
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}
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dpl = (e2 >> DESC_DPL_SHIFT) & 3;
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cpl = env->segs[R_CS] & 3;
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/* check privledge if software int */
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if (is_int && dpl < cpl)
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raise_exception_err(EXCP0D_GPF, intno * 8 + 2);
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/* check valid bit */
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if (!(e2 & DESC_P_MASK))
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raise_exception_err(EXCP0B_NOSEG, intno * 8 + 2);
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}
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#else
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/*
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* is_int is TRUE if coming from the int instruction. next_eip is the
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* EIP value AFTER the interrupt instruction. It is only relevant if
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* is_int is TRUE.
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*/
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void raise_interrupt(int intno, int is_int, int error_code,
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unsigned int next_eip)
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{
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SegmentDescriptorTable *dt;
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uint8_t *ptr;
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int dpl, cpl;
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uint32_t e2;
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dt = &env->idt;
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ptr = dt->base + (intno * 8);
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e2 = ldl(ptr + 4);
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dpl = (e2 >> DESC_DPL_SHIFT) & 3;
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cpl = 3;
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/* check privledge if software int */
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if (is_int && dpl < cpl)
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raise_exception_err(EXCP0D_GPF, intno * 8 + 2);
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/* Since we emulate only user space, we cannot do more than
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exiting the emulation with the suitable exception and error
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code */
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if (is_int)
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EIP = next_eip;
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env->exception_index = intno;
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env->error_code = error_code;
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cpu_loop_exit();
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}
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#endif
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/* shortcuts to generate exceptions */
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void raise_exception_err(int exception_index, int error_code)
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{
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raise_interrupt(exception_index, 0, error_code, 0);
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}
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void raise_exception(int exception_index)
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{
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raise_interrupt(exception_index, 0, 0, 0);
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}
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#ifdef BUGGY_GCC_DIV64
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/* gcc 2.95.4 on PowerPC does not seem to like using __udivdi3, so we
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call it from another function */
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uint32_t div64(uint32_t *q_ptr, uint64_t num, uint32_t den)
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{
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*q_ptr = num / den;
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return num % den;
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}
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int32_t idiv64(int32_t *q_ptr, int64_t num, int32_t den)
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{
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*q_ptr = num / den;
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return num % den;
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}
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#endif
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void helper_divl_EAX_T0(uint32_t eip)
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{
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unsigned int den, q, r;
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uint64_t num;
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num = EAX | ((uint64_t)EDX << 32);
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den = T0;
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if (den == 0) {
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EIP = eip;
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raise_exception(EXCP00_DIVZ);
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}
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#ifdef BUGGY_GCC_DIV64
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r = div64(&q, num, den);
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#else
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q = (num / den);
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r = (num % den);
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#endif
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EAX = q;
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EDX = r;
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}
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void helper_idivl_EAX_T0(uint32_t eip)
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{
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int den, q, r;
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int64_t num;
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num = EAX | ((uint64_t)EDX << 32);
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den = T0;
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if (den == 0) {
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EIP = eip;
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raise_exception(EXCP00_DIVZ);
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}
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#ifdef BUGGY_GCC_DIV64
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r = idiv64(&q, num, den);
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#else
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q = (num / den);
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r = (num % den);
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#endif
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EAX = q;
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EDX = r;
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}
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void helper_cmpxchg8b(void)
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{
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uint64_t d;
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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d = ldq((uint8_t *)A0);
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if (d == (((uint64_t)EDX << 32) | EAX)) {
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stq((uint8_t *)A0, ((uint64_t)ECX << 32) | EBX);
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eflags |= CC_Z;
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} else {
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EDX = d >> 32;
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EAX = d;
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eflags &= ~CC_Z;
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}
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CC_SRC = eflags;
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}
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/* We simulate a pre-MMX pentium as in valgrind */
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#define CPUID_FP87 (1 << 0)
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#define CPUID_VME (1 << 1)
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#define CPUID_DE (1 << 2)
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#define CPUID_PSE (1 << 3)
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#define CPUID_TSC (1 << 4)
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#define CPUID_MSR (1 << 5)
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#define CPUID_PAE (1 << 6)
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#define CPUID_MCE (1 << 7)
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#define CPUID_CX8 (1 << 8)
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#define CPUID_APIC (1 << 9)
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#define CPUID_SEP (1 << 11) /* sysenter/sysexit */
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#define CPUID_MTRR (1 << 12)
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#define CPUID_PGE (1 << 13)
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#define CPUID_MCA (1 << 14)
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#define CPUID_CMOV (1 << 15)
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/* ... */
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#define CPUID_MMX (1 << 23)
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#define CPUID_FXSR (1 << 24)
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#define CPUID_SSE (1 << 25)
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#define CPUID_SSE2 (1 << 26)
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void helper_cpuid(void)
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{
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if (EAX == 0) {
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EAX = 1; /* max EAX index supported */
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EBX = 0x756e6547;
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ECX = 0x6c65746e;
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EDX = 0x49656e69;
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} else if (EAX == 1) {
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/* EAX = 1 info */
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EAX = 0x52b;
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EBX = 0;
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ECX = 0;
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EDX = CPUID_FP87 | CPUID_DE | CPUID_PSE |
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CPUID_TSC | CPUID_MSR | CPUID_MCE |
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CPUID_CX8;
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}
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}
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/* only works if protected mode and not VM86 */
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void load_seg(int seg_reg, int selector, unsigned cur_eip)
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{
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SegmentCache *sc;
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SegmentDescriptorTable *dt;
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int index;
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uint32_t e1, e2;
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uint8_t *ptr;
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sc = &env->seg_cache[seg_reg];
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if ((selector & 0xfffc) == 0) {
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/* null selector case */
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if (seg_reg == R_SS) {
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EIP = cur_eip;
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raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
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} else {
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/* XXX: each access should trigger an exception */
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sc->base = NULL;
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sc->limit = 0;
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sc->seg_32bit = 1;
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}
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} else {
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if (selector & 0x4)
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dt = &env->ldt;
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else
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dt = &env->gdt;
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index = selector & ~7;
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if ((index + 7) > dt->limit) {
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EIP = cur_eip;
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raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
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}
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ptr = dt->base + index;
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e1 = ldl(ptr);
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e2 = ldl(ptr + 4);
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if (!(e2 & DESC_S_MASK) ||
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(e2 & (DESC_CS_MASK | DESC_R_MASK)) == DESC_CS_MASK) {
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EIP = cur_eip;
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raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
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}
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if (seg_reg == R_SS) {
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if ((e2 & (DESC_CS_MASK | DESC_W_MASK)) == 0) {
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EIP = cur_eip;
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raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
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}
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} else {
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if ((e2 & (DESC_CS_MASK | DESC_R_MASK)) == DESC_CS_MASK) {
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EIP = cur_eip;
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raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
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}
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}
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if (!(e2 & DESC_P_MASK)) {
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EIP = cur_eip;
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if (seg_reg == R_SS)
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raise_exception_err(EXCP0C_STACK, selector & 0xfffc);
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else
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raise_exception_err(EXCP0B_NOSEG, selector & 0xfffc);
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}
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sc->base = (void *)((e1 >> 16) | ((e2 & 0xff) << 16) | (e2 & 0xff000000));
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sc->limit = (e1 & 0xffff) | (e2 & 0x000f0000);
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if (e2 & (1 << 23))
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sc->limit = (sc->limit << 12) | 0xfff;
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sc->seg_32bit = (e2 >> 22) & 1;
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#if 0
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fprintf(logfile, "load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx seg_32bit=%d\n",
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selector, (unsigned long)sc->base, sc->limit, sc->seg_32bit);
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#endif
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}
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env->segs[seg_reg] = selector;
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}
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/* rdtsc */
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#ifndef __i386__
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uint64_t emu_time;
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#endif
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void helper_rdtsc(void)
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{
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uint64_t val;
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#ifdef __i386__
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asm("rdtsc" : "=A" (val));
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#else
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/* better than nothing: the time increases */
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val = emu_time++;
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#endif
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EAX = val;
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EDX = val >> 32;
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}
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void helper_lsl(void)
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{
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unsigned int selector, limit;
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SegmentDescriptorTable *dt;
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int index;
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uint32_t e1, e2;
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uint8_t *ptr;
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CC_SRC = cc_table[CC_OP].compute_all() & ~CC_Z;
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selector = T0 & 0xffff;
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if (selector & 0x4)
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dt = &env->ldt;
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else
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dt = &env->gdt;
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index = selector & ~7;
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if ((index + 7) > dt->limit)
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return;
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ptr = dt->base + index;
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e1 = ldl(ptr);
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e2 = ldl(ptr + 4);
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limit = (e1 & 0xffff) | (e2 & 0x000f0000);
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if (e2 & (1 << 23))
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limit = (limit << 12) | 0xfff;
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T1 = limit;
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CC_SRC |= CC_Z;
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}
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void helper_lar(void)
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{
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unsigned int selector;
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SegmentDescriptorTable *dt;
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int index;
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uint32_t e2;
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uint8_t *ptr;
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CC_SRC = cc_table[CC_OP].compute_all() & ~CC_Z;
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selector = T0 & 0xffff;
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if (selector & 0x4)
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dt = &env->ldt;
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else
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dt = &env->gdt;
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index = selector & ~7;
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if ((index + 7) > dt->limit)
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return;
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ptr = dt->base + index;
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e2 = ldl(ptr + 4);
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T1 = e2 & 0x00f0ff00;
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CC_SRC |= CC_Z;
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}
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/* FPU helpers */
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#ifndef USE_X86LDOUBLE
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void helper_fldt_ST0_A0(void)
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{
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ST0 = helper_fldt((uint8_t *)A0);
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}
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void helper_fstt_ST0_A0(void)
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{
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helper_fstt(ST0, (uint8_t *)A0);
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}
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#endif
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/* BCD ops */
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#define MUL10(iv) ( iv + iv + (iv << 3) )
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void helper_fbld_ST0_A0(void)
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{
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uint8_t *seg;
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CPU86_LDouble fpsrcop;
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int m32i;
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unsigned int v;
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/* in this code, seg/m32i will be used as temporary ptr/int */
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seg = (uint8_t *)A0 + 8;
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v = ldub(seg--);
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/* XXX: raise exception */
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if (v != 0)
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return;
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v = ldub(seg--);
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/* XXX: raise exception */
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if ((v & 0xf0) != 0)
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return;
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m32i = v; /* <-- d14 */
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v = ldub(seg--);
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m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d13 */
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m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d12 */
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v = ldub(seg--);
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m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d11 */
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m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d10 */
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v = ldub(seg--);
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m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d9 */
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m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d8 */
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fpsrcop = ((CPU86_LDouble)m32i) * 100000000.0;
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v = ldub(seg--);
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m32i = (v >> 4); /* <-- d7 */
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m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d6 */
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v = ldub(seg--);
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m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d5 */
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m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d4 */
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v = ldub(seg--);
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m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d3 */
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m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d2 */
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v = ldub(seg);
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m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d1 */
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m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d0 */
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fpsrcop += ((CPU86_LDouble)m32i);
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if ( ldub(seg+9) & 0x80 )
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fpsrcop = -fpsrcop;
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ST0 = fpsrcop;
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}
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void helper_fbst_ST0_A0(void)
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{
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CPU86_LDouble fptemp;
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CPU86_LDouble fpsrcop;
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int v;
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uint8_t *mem_ref, *mem_end;
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fpsrcop = rint(ST0);
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mem_ref = (uint8_t *)A0;
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mem_end = mem_ref + 8;
|
|
if ( fpsrcop < 0.0 ) {
|
|
stw(mem_end, 0x8000);
|
|
fpsrcop = -fpsrcop;
|
|
} else {
|
|
stw(mem_end, 0x0000);
|
|
}
|
|
while (mem_ref < mem_end) {
|
|
if (fpsrcop == 0.0)
|
|
break;
|
|
fptemp = floor(fpsrcop/10.0);
|
|
v = ((int)(fpsrcop - fptemp*10.0));
|
|
if (fptemp == 0.0) {
|
|
stb(mem_ref++, v);
|
|
break;
|
|
}
|
|
fpsrcop = fptemp;
|
|
fptemp = floor(fpsrcop/10.0);
|
|
v |= (((int)(fpsrcop - fptemp*10.0)) << 4);
|
|
stb(mem_ref++, v);
|
|
fpsrcop = fptemp;
|
|
}
|
|
while (mem_ref < mem_end) {
|
|
stb(mem_ref++, 0);
|
|
}
|
|
}
|
|
|
|
void helper_f2xm1(void)
|
|
{
|
|
ST0 = pow(2.0,ST0) - 1.0;
|
|
}
|
|
|
|
void helper_fyl2x(void)
|
|
{
|
|
CPU86_LDouble fptemp;
|
|
|
|
fptemp = ST0;
|
|
if (fptemp>0.0){
|
|
fptemp = log(fptemp)/log(2.0); /* log2(ST) */
|
|
ST1 *= fptemp;
|
|
fpop();
|
|
} else {
|
|
env->fpus &= (~0x4700);
|
|
env->fpus |= 0x400;
|
|
}
|
|
}
|
|
|
|
void helper_fptan(void)
|
|
{
|
|
CPU86_LDouble fptemp;
|
|
|
|
fptemp = ST0;
|
|
if((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
|
|
env->fpus |= 0x400;
|
|
} else {
|
|
ST0 = tan(fptemp);
|
|
fpush();
|
|
ST0 = 1.0;
|
|
env->fpus &= (~0x400); /* C2 <-- 0 */
|
|
/* the above code is for |arg| < 2**52 only */
|
|
}
|
|
}
|
|
|
|
void helper_fpatan(void)
|
|
{
|
|
CPU86_LDouble fptemp, fpsrcop;
|
|
|
|
fpsrcop = ST1;
|
|
fptemp = ST0;
|
|
ST1 = atan2(fpsrcop,fptemp);
|
|
fpop();
|
|
}
|
|
|
|
void helper_fxtract(void)
|
|
{
|
|
CPU86_LDoubleU temp;
|
|
unsigned int expdif;
|
|
|
|
temp.d = ST0;
|
|
expdif = EXPD(temp) - EXPBIAS;
|
|
/*DP exponent bias*/
|
|
ST0 = expdif;
|
|
fpush();
|
|
BIASEXPONENT(temp);
|
|
ST0 = temp.d;
|
|
}
|
|
|
|
void helper_fprem1(void)
|
|
{
|
|
CPU86_LDouble dblq, fpsrcop, fptemp;
|
|
CPU86_LDoubleU fpsrcop1, fptemp1;
|
|
int expdif;
|
|
int q;
|
|
|
|
fpsrcop = ST0;
|
|
fptemp = ST1;
|
|
fpsrcop1.d = fpsrcop;
|
|
fptemp1.d = fptemp;
|
|
expdif = EXPD(fpsrcop1) - EXPD(fptemp1);
|
|
if (expdif < 53) {
|
|
dblq = fpsrcop / fptemp;
|
|
dblq = (dblq < 0.0)? ceil(dblq): floor(dblq);
|
|
ST0 = fpsrcop - fptemp*dblq;
|
|
q = (int)dblq; /* cutting off top bits is assumed here */
|
|
env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
|
|
/* (C0,C1,C3) <-- (q2,q1,q0) */
|
|
env->fpus |= (q&0x4) << 6; /* (C0) <-- q2 */
|
|
env->fpus |= (q&0x2) << 8; /* (C1) <-- q1 */
|
|
env->fpus |= (q&0x1) << 14; /* (C3) <-- q0 */
|
|
} else {
|
|
env->fpus |= 0x400; /* C2 <-- 1 */
|
|
fptemp = pow(2.0, expdif-50);
|
|
fpsrcop = (ST0 / ST1) / fptemp;
|
|
/* fpsrcop = integer obtained by rounding to the nearest */
|
|
fpsrcop = (fpsrcop-floor(fpsrcop) < ceil(fpsrcop)-fpsrcop)?
|
|
floor(fpsrcop): ceil(fpsrcop);
|
|
ST0 -= (ST1 * fpsrcop * fptemp);
|
|
}
|
|
}
|
|
|
|
void helper_fprem(void)
|
|
{
|
|
CPU86_LDouble dblq, fpsrcop, fptemp;
|
|
CPU86_LDoubleU fpsrcop1, fptemp1;
|
|
int expdif;
|
|
int q;
|
|
|
|
fpsrcop = ST0;
|
|
fptemp = ST1;
|
|
fpsrcop1.d = fpsrcop;
|
|
fptemp1.d = fptemp;
|
|
expdif = EXPD(fpsrcop1) - EXPD(fptemp1);
|
|
if ( expdif < 53 ) {
|
|
dblq = fpsrcop / fptemp;
|
|
dblq = (dblq < 0.0)? ceil(dblq): floor(dblq);
|
|
ST0 = fpsrcop - fptemp*dblq;
|
|
q = (int)dblq; /* cutting off top bits is assumed here */
|
|
env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
|
|
/* (C0,C1,C3) <-- (q2,q1,q0) */
|
|
env->fpus |= (q&0x4) << 6; /* (C0) <-- q2 */
|
|
env->fpus |= (q&0x2) << 8; /* (C1) <-- q1 */
|
|
env->fpus |= (q&0x1) << 14; /* (C3) <-- q0 */
|
|
} else {
|
|
env->fpus |= 0x400; /* C2 <-- 1 */
|
|
fptemp = pow(2.0, expdif-50);
|
|
fpsrcop = (ST0 / ST1) / fptemp;
|
|
/* fpsrcop = integer obtained by chopping */
|
|
fpsrcop = (fpsrcop < 0.0)?
|
|
-(floor(fabs(fpsrcop))): floor(fpsrcop);
|
|
ST0 -= (ST1 * fpsrcop * fptemp);
|
|
}
|
|
}
|
|
|
|
void helper_fyl2xp1(void)
|
|
{
|
|
CPU86_LDouble fptemp;
|
|
|
|
fptemp = ST0;
|
|
if ((fptemp+1.0)>0.0) {
|
|
fptemp = log(fptemp+1.0) / log(2.0); /* log2(ST+1.0) */
|
|
ST1 *= fptemp;
|
|
fpop();
|
|
} else {
|
|
env->fpus &= (~0x4700);
|
|
env->fpus |= 0x400;
|
|
}
|
|
}
|
|
|
|
void helper_fsqrt(void)
|
|
{
|
|
CPU86_LDouble fptemp;
|
|
|
|
fptemp = ST0;
|
|
if (fptemp<0.0) {
|
|
env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
|
|
env->fpus |= 0x400;
|
|
}
|
|
ST0 = sqrt(fptemp);
|
|
}
|
|
|
|
void helper_fsincos(void)
|
|
{
|
|
CPU86_LDouble fptemp;
|
|
|
|
fptemp = ST0;
|
|
if ((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
|
|
env->fpus |= 0x400;
|
|
} else {
|
|
ST0 = sin(fptemp);
|
|
fpush();
|
|
ST0 = cos(fptemp);
|
|
env->fpus &= (~0x400); /* C2 <-- 0 */
|
|
/* the above code is for |arg| < 2**63 only */
|
|
}
|
|
}
|
|
|
|
void helper_frndint(void)
|
|
{
|
|
ST0 = rint(ST0);
|
|
}
|
|
|
|
void helper_fscale(void)
|
|
{
|
|
CPU86_LDouble fpsrcop, fptemp;
|
|
|
|
fpsrcop = 2.0;
|
|
fptemp = pow(fpsrcop,ST1);
|
|
ST0 *= fptemp;
|
|
}
|
|
|
|
void helper_fsin(void)
|
|
{
|
|
CPU86_LDouble fptemp;
|
|
|
|
fptemp = ST0;
|
|
if ((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
|
|
env->fpus |= 0x400;
|
|
} else {
|
|
ST0 = sin(fptemp);
|
|
env->fpus &= (~0x400); /* C2 <-- 0 */
|
|
/* the above code is for |arg| < 2**53 only */
|
|
}
|
|
}
|
|
|
|
void helper_fcos(void)
|
|
{
|
|
CPU86_LDouble fptemp;
|
|
|
|
fptemp = ST0;
|
|
if((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
|
|
env->fpus |= 0x400;
|
|
} else {
|
|
ST0 = cos(fptemp);
|
|
env->fpus &= (~0x400); /* C2 <-- 0 */
|
|
/* the above code is for |arg5 < 2**63 only */
|
|
}
|
|
}
|
|
|
|
void helper_fxam_ST0(void)
|
|
{
|
|
CPU86_LDoubleU temp;
|
|
int expdif;
|
|
|
|
temp.d = ST0;
|
|
|
|
env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
|
|
if (SIGND(temp))
|
|
env->fpus |= 0x200; /* C1 <-- 1 */
|
|
|
|
expdif = EXPD(temp);
|
|
if (expdif == MAXEXPD) {
|
|
if (MANTD(temp) == 0)
|
|
env->fpus |= 0x500 /*Infinity*/;
|
|
else
|
|
env->fpus |= 0x100 /*NaN*/;
|
|
} else if (expdif == 0) {
|
|
if (MANTD(temp) == 0)
|
|
env->fpus |= 0x4000 /*Zero*/;
|
|
else
|
|
env->fpus |= 0x4400 /*Denormal*/;
|
|
} else {
|
|
env->fpus |= 0x400;
|
|
}
|
|
}
|
|
|
|
void helper_fstenv(uint8_t *ptr, int data32)
|
|
{
|
|
int fpus, fptag, exp, i;
|
|
uint64_t mant;
|
|
CPU86_LDoubleU tmp;
|
|
|
|
fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
|
|
fptag = 0;
|
|
for (i=7; i>=0; i--) {
|
|
fptag <<= 2;
|
|
if (env->fptags[i]) {
|
|
fptag |= 3;
|
|
} else {
|
|
tmp.d = env->fpregs[i];
|
|
exp = EXPD(tmp);
|
|
mant = MANTD(tmp);
|
|
if (exp == 0 && mant == 0) {
|
|
/* zero */
|
|
fptag |= 1;
|
|
} else if (exp == 0 || exp == MAXEXPD
|
|
#ifdef USE_X86LDOUBLE
|
|
|| (mant & (1LL << 63)) == 0
|
|
#endif
|
|
) {
|
|
/* NaNs, infinity, denormal */
|
|
fptag |= 2;
|
|
}
|
|
}
|
|
}
|
|
if (data32) {
|
|
/* 32 bit */
|
|
stl(ptr, env->fpuc);
|
|
stl(ptr + 4, fpus);
|
|
stl(ptr + 8, fptag);
|
|
stl(ptr + 12, 0);
|
|
stl(ptr + 16, 0);
|
|
stl(ptr + 20, 0);
|
|
stl(ptr + 24, 0);
|
|
} else {
|
|
/* 16 bit */
|
|
stw(ptr, env->fpuc);
|
|
stw(ptr + 2, fpus);
|
|
stw(ptr + 4, fptag);
|
|
stw(ptr + 6, 0);
|
|
stw(ptr + 8, 0);
|
|
stw(ptr + 10, 0);
|
|
stw(ptr + 12, 0);
|
|
}
|
|
}
|
|
|
|
void helper_fldenv(uint8_t *ptr, int data32)
|
|
{
|
|
int i, fpus, fptag;
|
|
|
|
if (data32) {
|
|
env->fpuc = lduw(ptr);
|
|
fpus = lduw(ptr + 4);
|
|
fptag = lduw(ptr + 8);
|
|
}
|
|
else {
|
|
env->fpuc = lduw(ptr);
|
|
fpus = lduw(ptr + 2);
|
|
fptag = lduw(ptr + 4);
|
|
}
|
|
env->fpstt = (fpus >> 11) & 7;
|
|
env->fpus = fpus & ~0x3800;
|
|
for(i = 0;i < 7; i++) {
|
|
env->fptags[i] = ((fptag & 3) == 3);
|
|
fptag >>= 2;
|
|
}
|
|
}
|
|
|
|
void helper_fsave(uint8_t *ptr, int data32)
|
|
{
|
|
CPU86_LDouble tmp;
|
|
int i;
|
|
|
|
helper_fstenv(ptr, data32);
|
|
|
|
ptr += (14 << data32);
|
|
for(i = 0;i < 8; i++) {
|
|
tmp = ST(i);
|
|
#ifdef USE_X86LDOUBLE
|
|
*(long double *)ptr = tmp;
|
|
#else
|
|
helper_fstt(tmp, ptr);
|
|
#endif
|
|
ptr += 10;
|
|
}
|
|
|
|
/* fninit */
|
|
env->fpus = 0;
|
|
env->fpstt = 0;
|
|
env->fpuc = 0x37f;
|
|
env->fptags[0] = 1;
|
|
env->fptags[1] = 1;
|
|
env->fptags[2] = 1;
|
|
env->fptags[3] = 1;
|
|
env->fptags[4] = 1;
|
|
env->fptags[5] = 1;
|
|
env->fptags[6] = 1;
|
|
env->fptags[7] = 1;
|
|
}
|
|
|
|
void helper_frstor(uint8_t *ptr, int data32)
|
|
{
|
|
CPU86_LDouble tmp;
|
|
int i;
|
|
|
|
helper_fldenv(ptr, data32);
|
|
ptr += (14 << data32);
|
|
|
|
for(i = 0;i < 8; i++) {
|
|
#ifdef USE_X86LDOUBLE
|
|
tmp = *(long double *)ptr;
|
|
#else
|
|
tmp = helper_fldt(ptr);
|
|
#endif
|
|
ST(i) = tmp;
|
|
ptr += 10;
|
|
}
|
|
}
|
|
|