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The current DMA routines are driven by a call in main_loop_wait() after every select. This patch converts the DMA code to be driven by a constantly rescheduled bottom half. The advantage of using a scheduled bottom half is that we can stop scheduling the bottom half when there no DMA channels are runnable. This means we can potentially detect this case and sleep longer in the main loop. The only two architectures implementing DMA_run() are cris and i386. For cris, I converted it to a simple repeating bottom half. I've only compile tested this as cris does not seem to work on a 64-bit host. It should be functionally identical to the previous implementation so I expect it to work. For x86, I've made sure to only fire the DMA bottom half if there is a DMA channel that is runnable. The effect of this is that unless you're using sb16 or a floppy disk, the DMA bottom half never fires. You probably should test this malc. My own benchmarks actually show slight improvement by it's possible the change in timing could affect your demos. Since v1, I've changed the code to use a BH instead of a timer. cris at least seems to depend on faster than 10ms polling. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5573 c046a42c-6fe2-441c-8c8c-71466251a162
27 lines
919 B
C
27 lines
919 B
C
#ifndef HW_ISA_H
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#define HW_ISA_H
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/* ISA bus */
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extern target_phys_addr_t isa_mem_base;
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int register_ioport_read(int start, int length, int size,
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IOPortReadFunc *func, void *opaque);
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int register_ioport_write(int start, int length, int size,
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IOPortWriteFunc *func, void *opaque);
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void isa_unassign_ioport(int start, int length);
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void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
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/* dma.c */
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int DMA_get_channel_mode (int nchan);
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int DMA_read_memory (int nchan, void *buf, int pos, int size);
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int DMA_write_memory (int nchan, void *buf, int pos, int size);
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void DMA_hold_DREQ (int nchan);
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void DMA_release_DREQ (int nchan);
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void DMA_schedule(int nchan);
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void DMA_init (int high_page_enable);
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void DMA_register_channel (int nchan,
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DMA_transfer_handler transfer_handler,
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void *opaque);
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#endif
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