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42331e9f2f
This patch removes unnecessary & 0xff in pci_dev_find_by_addr(). Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
231 lines
6.6 KiB
C
231 lines
6.6 KiB
C
/*
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* pci_host.c
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*
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* Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "pci.h"
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#include "pci_host.h"
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/* debug PCI */
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//#define DEBUG_PCI
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#ifdef DEBUG_PCI
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#define PCI_DPRINTF(fmt, ...) \
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do { printf("pci_host_data: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define PCI_DPRINTF(fmt, ...)
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#endif
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/*
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* PCI address
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* bit 16 - 24: bus number
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* bit 8 - 15: devfun number
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* bit 0 - 7: offset in configuration space of a given pci device
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*/
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/* the helper functio to get a PCIDeice* for a given pci address */
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static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus, uint32_t addr)
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{
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uint8_t bus_num = addr >> 16;
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uint8_t devfn = addr >> 8;
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return pci_find_device(bus, bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn));
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}
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void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len)
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{
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PCIDevice *pci_dev = pci_dev_find_by_addr(s, addr);
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uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1);
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if (!pci_dev)
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return;
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PCI_DPRINTF("%s: %s: addr=%02"PRIx32" val=%08"PRI32x" len=%d\n",
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__func__, pci_dev->name, config_addr, val, len);
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pci_dev->config_write(pci_dev, config_addr, val, len);
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}
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uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len)
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{
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PCIDevice *pci_dev = pci_dev_find_by_addr(s, addr);
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uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1);
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uint32_t val;
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assert(len == 1 || len == 2 || len == 4);
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if (!pci_dev) {
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return ~0x0;
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}
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val = pci_dev->config_read(pci_dev, config_addr, len);
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PCI_DPRINTF("%s: %s: addr=%02"PRIx32" val=%08"PRIx32" len=%d\n",
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__func__, pci_dev->name, config_addr, val, len);
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return val;
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}
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static void pci_host_config_writel(void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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PCIHostState *s = opaque;
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap32(val);
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#endif
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PCI_DPRINTF("%s addr " TARGET_FMT_plx " val %"PRIx32"\n",
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__func__, addr, val);
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s->config_reg = val;
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}
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static uint32_t pci_host_config_readl(void *opaque, target_phys_addr_t addr)
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{
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PCIHostState *s = opaque;
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uint32_t val = s->config_reg;
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap32(val);
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#endif
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PCI_DPRINTF("%s addr " TARGET_FMT_plx " val %"PRIx32"\n",
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__func__, addr, val);
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return val;
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}
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static CPUWriteMemoryFunc * const pci_host_config_write[] = {
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&pci_host_config_writel,
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&pci_host_config_writel,
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&pci_host_config_writel,
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};
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static CPUReadMemoryFunc * const pci_host_config_read[] = {
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&pci_host_config_readl,
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&pci_host_config_readl,
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&pci_host_config_readl,
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};
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int pci_host_conf_register_mmio(PCIHostState *s)
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{
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return cpu_register_io_memory(pci_host_config_read,
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pci_host_config_write, s);
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}
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static void pci_host_config_writel_noswap(void *opaque,
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target_phys_addr_t addr,
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uint32_t val)
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{
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PCIHostState *s = opaque;
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PCI_DPRINTF("%s addr " TARGET_FMT_plx " val %"PRIx32"\n",
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__func__, addr, val);
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s->config_reg = val;
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}
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static uint32_t pci_host_config_readl_noswap(void *opaque,
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target_phys_addr_t addr)
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{
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PCIHostState *s = opaque;
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uint32_t val = s->config_reg;
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PCI_DPRINTF("%s addr " TARGET_FMT_plx " val %"PRIx32"\n",
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__func__, addr, val);
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return val;
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}
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static CPUWriteMemoryFunc * const pci_host_config_write_noswap[] = {
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&pci_host_config_writel_noswap,
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&pci_host_config_writel_noswap,
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&pci_host_config_writel_noswap,
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};
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static CPUReadMemoryFunc * const pci_host_config_read_noswap[] = {
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&pci_host_config_readl_noswap,
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&pci_host_config_readl_noswap,
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&pci_host_config_readl_noswap,
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};
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int pci_host_conf_register_mmio_noswap(PCIHostState *s)
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{
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return cpu_register_io_memory(pci_host_config_read_noswap,
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pci_host_config_write_noswap, s);
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}
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static void pci_host_config_writel_ioport(void *opaque,
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uint32_t addr, uint32_t val)
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{
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PCIHostState *s = opaque;
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PCI_DPRINTF("%s addr %"PRIx32 " val %"PRIx32"\n", __func__, addr, val);
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s->config_reg = val;
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}
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static uint32_t pci_host_config_readl_ioport(void *opaque, uint32_t addr)
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{
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PCIHostState *s = opaque;
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uint32_t val = s->config_reg;
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PCI_DPRINTF("%s addr %"PRIx32" val %"PRIx32"\n", __func__, addr, val);
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return val;
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}
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void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s)
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{
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register_ioport_write(ioport, 4, 4, pci_host_config_writel_ioport, s);
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register_ioport_read(ioport, 4, 4, pci_host_config_readl_ioport, s);
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}
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#define PCI_ADDR_T target_phys_addr_t
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#define PCI_HOST_SUFFIX _mmio
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#include "pci_host_template.h"
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static CPUWriteMemoryFunc * const pci_host_data_write_mmio[] = {
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pci_host_data_writeb_mmio,
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pci_host_data_writew_mmio,
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pci_host_data_writel_mmio,
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};
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static CPUReadMemoryFunc * const pci_host_data_read_mmio[] = {
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pci_host_data_readb_mmio,
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pci_host_data_readw_mmio,
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pci_host_data_readl_mmio,
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};
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int pci_host_data_register_mmio(PCIHostState *s)
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{
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return cpu_register_io_memory(pci_host_data_read_mmio,
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pci_host_data_write_mmio,
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s);
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}
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#undef PCI_ADDR_T
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#undef PCI_HOST_SUFFIX
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#define PCI_ADDR_T uint32_t
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#define PCI_HOST_SUFFIX _ioport
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#include "pci_host_template.h"
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void pci_host_data_register_ioport(pio_addr_t ioport, PCIHostState *s)
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{
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register_ioport_write(ioport, 4, 1, pci_host_data_writeb_ioport, s);
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register_ioport_write(ioport, 4, 2, pci_host_data_writew_ioport, s);
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register_ioport_write(ioport, 4, 4, pci_host_data_writel_ioport, s);
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register_ioport_read(ioport, 4, 1, pci_host_data_readb_ioport, s);
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register_ioport_read(ioport, 4, 2, pci_host_data_readw_ioport, s);
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register_ioport_read(ioport, 4, 4, pci_host_data_readl_ioport, s);
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}
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