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9a8c26c08c
xemu/hw/dma
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Frank Chang 9a8c26c08c hw/dma: sifive_pdma: claim bit must be set before DMA transactions 
Real PDMA must have Control.claim bit to be set before
Control.run bit is set to start any DMA transactions.
Otherwise nothing will be transferred.

The following result is PDMA tested in U-Boot on Unmatched board:

=> mw.l 0x3000000 0x0                      <= Disclaim channel 0
                                              (Channel 0 is not claimed)
=> mw.l 0x3000004 0x55000000               <= wsize = rsize = 5 (2^5 = 32 bytes)
=> mw.q 0x3000008 0x2                      <= NextBytes = 2
=> mw.q 0x3000010 0x84000000               <= NextDestination = 0x84000000
=> mw.q 0x3000018 0x84001000               <= NextSource = 0x84001000
=> mw.l 0x84000000 0x87654321              <= Fill test data to dst
=> mw.l 0x84001000 0x12345678              <= Fill test data to src
=> md.l 0x84000000 1; md.l 0x84001000 1    <= Dump src/dst memory contents
84000000: 87654321                               !Ce.
84001000: 12345678                               xV4.
=> md.l 0x3000000 8                        <= Dump PDMA status
03000000: 00000000 55000000 00000002 00000000    .......U........
03000010: 84000000 00000000 84001000 00000000    ................
=> mw.l 0x3000000 0x3                      <= Set channel 0 run and claim bits
=> md.l 0x3000000 8                        <= Dump PDMA status
03000000: 00000001 66000000 00000000 00000000    .......f........
03000010: 00000000 00000000 00000000 00000000    ................
=> md.l 0x84000000 1; md.l 0x84001000 1    <= Dump src/dst memory contents
84000000: 87654321                               !Ce.
84001000: 12345678                               xV4.

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Tested-by: Max Hsu <max.hsu@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 20210912130553.179501-3-frank.chang@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-09-21 07:56:49 +10:00
..
bcm2835_dma.c qom: Don't handle impossible object_property_get_link() failure 2020-07-10 15:18:08 +02:00
etraxfs_dma.c Remove unnecessary cast when using the cpu_[physical]_memory API 2020-02-20 14:47:08 +01:00
i8257.c i8257: Move QOM macro to header 2020-08-27 14:04:54 -04:00
i82374.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
Kconfig hw/dma: Implement a Xilinx CSU DMA model 2021-03-08 17:20:04 +00:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00
omap_dma.c hw/dma/omap_dma: Move switch 'fall through' comment to correct place 2019-08-21 10:55:23 +02:00
pl080.c Do not include exec/address-spaces.h if it's not really necessary 2021-05-02 17:24:51 +02:00
pl330.c hw/dma/pl330: Add memory region to replace default 2021-08-25 10:48:50 +01:00
pxa2xx_dma.c hw/arm: Constify VMStateDescription 2021-05-02 17:24:50 +02:00
rc4030.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
sifive_pdma.c hw/dma: sifive_pdma: claim bit must be set before DMA transactions 2021-09-21 07:56:49 +10:00
soc_dma.c misc: Replace zero-length arrays with flexible array member (automatic) 2020-03-16 22:07:42 +01:00
sparc32_dma.c esp: rename existing ESP QOM type to SYSBUS_ESP 2021-03-07 10:39:05 +00:00
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
xilinx_axidma.c hw/dma/xilinx_axidma: Rename StreamSlave as StreamSink 2020-12-10 12:15:04 -05:00
xlnx_csu_dma.c hw/dma/xlnx_csu_dma: Always expect 'dma' link property to be set 2021-08-26 17:01:59 +01:00
xlnx_dpdma.c util/hexdump: Reorder qemu_hexdump() arguments 2020-09-11 21:25:59 +02:00
xlnx-zdma.c hw/dma/xlnx-zdma Always expect 'dma' link property to be set 2021-08-26 17:01:59 +01:00
xlnx-zynq-devcfg.c Clean up inclusion of sysemu/sysemu.h 2019-08-16 13:31:53 +02:00