xemu/hw/ssi
Cédric Le Goater f95c4bffdc aspeed/smc: snoop SPI transfers to fake dummy cycles
The m25p80 models dummy cycles using byte transfers. This works well
when the transfers are initiated by the QEMU model of a SPI controller
but when these are initiated by the OS, it breaks emulation.

Snoop the SPI transfer to catch commands requiring dummy cycles and
replace them with byte transfers compatible with the m25p80 model.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Message-id: 20190124140519.13838-5-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-01-29 11:46:05 +00:00
..
aspeed_smc.c aspeed/smc: snoop SPI transfers to fake dummy cycles 2019-01-29 11:46:05 +00:00
imx_spi.c
Makefile.objs
mss-spi.c
omap_spi.c
pl022.c hw/ssi/pl022: Correct wrong DMACR and ICR handling 2018-08-24 13:17:46 +01:00
ssi.c
stm32f2xx_spi.c
xilinx_spi.c hw/ssi/xilinx_spi: Use DeviceState::realize rather than SysBusDevice::init 2018-10-24 06:44:59 -03:00
xilinx_spips.c