xemu/target-mips
Andreas Färber a0e372f0c4 cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs
CPUState::gdb_num_regs replaces num_g_regs.
CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS.

Allows building gdb_register_coprocessor() for xtensa, too.

As a side effect this should fix coprocessor register numbering for SMP.

Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26 23:23:54 +02:00
..
cpu-qom.h cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook 2013-07-23 02:41:33 +02:00
cpu.c cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs 2013-07-26 23:23:54 +02:00
cpu.h cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb() 2013-07-23 02:41:32 +02:00
dsp_helper.c target-mips: clean-up in BIT_INSV 2013-05-20 18:16:17 +02:00
helper.c cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook 2013-07-23 02:41:33 +02:00
helper.h target-mips: Use mul[us]2 in [D]MULT[U] insns 2013-02-23 17:25:29 +00:00
lmi_helper.c target-mips: Implement Loongson Multimedia Instructions 2012-09-19 21:40:48 +02:00
machine.c target-mips: Don't overuse CPUState 2012-03-14 22:20:25 +01:00
Makefile.objs target-mips: Add ASE DSP internal functions 2012-10-31 20:24:05 +01:00
mips-defs.h MIPS: Initial support of fulong mini pc (CPU definition) 2010-06-29 23:07:52 +02:00
op_helper.c cpu: Make first_cpu and next_cpu CPUState 2013-07-09 21:32:54 +02:00
TODO target-mips: Change TODO file 2012-10-31 21:37:24 +01:00
translate_init.c target-mips: Add ASE DSP processors 2012-10-31 21:37:20 +01:00
translate.c cpu: Move singlestep_enabled field from CPU_COMMON to CPUState 2013-07-23 02:41:32 +02:00