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In various Freescale SOCs, the GPT timers can be configured to select its input clock. Depending on the SOC the set of available input clocks may vary. The actual single GPT definition was no good enough and because of it booting the sabrelite board with a i.MX6DL device tree would fail because of an incorrect input clock definition for the i.MX6DL SOC. This patch fixes the i.MX6DL boot failure by adding the ability to define a different set of input clocks depending on the considered SOC. A different class has been defined for i.MX25, i.MX31 and i.MX6 each with its specific set of input clocks. The patch has been tested by booting KZM, i.MX25 PDK, i.MX6Q sabrelite and i.MX6DL sabrelite. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 1467325619-8374-1-git-send-email-jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: fixed spacing round '/' operator] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
68 lines
1.6 KiB
C
68 lines
1.6 KiB
C
/*
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* IMX Clock Control Module base class
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*
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* Copyright (C) 2012 NICTA
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* Updated by Jean-Christophe Dubois <jcd@tribudubois.net>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef IMX_CCM_H
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#define IMX_CCM_H
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#include "hw/sysbus.h"
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#define CKIL_FREQ 32768 /* nominal 32khz clock */
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/* PLL control registers */
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#define PD(v) (((v) >> 26) & 0xf)
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#define MFD(v) (((v) >> 16) & 0x3ff)
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#define MFI(v) (((v) >> 10) & 0xf);
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#define MFN(v) ((v) & 0x3ff)
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#define PLL_PD(x) (((x) & 0xf) << 26)
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#define PLL_MFD(x) (((x) & 0x3ff) << 16)
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#define PLL_MFI(x) (((x) & 0xf) << 10)
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#define PLL_MFN(x) (((x) & 0x3ff) << 0)
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#define TYPE_IMX_CCM "imx.ccm"
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#define IMX_CCM(obj) \
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OBJECT_CHECK(IMXCCMState, (obj), TYPE_IMX_CCM)
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#define IMX_CCM_CLASS(klass) \
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OBJECT_CLASS_CHECK(IMXCCMClass, (klass), TYPE_IMX_CCM)
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#define IMX_GET_CLASS(obj) \
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OBJECT_GET_CLASS(IMXCCMClass, (obj), TYPE_IMX_CCM)
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typedef struct IMXCCMState {
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/* <private> */
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SysBusDevice parent_obj;
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/* <public> */
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} IMXCCMState;
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typedef enum {
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CLK_NONE,
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CLK_IPG,
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CLK_IPG_HIGH,
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CLK_32k,
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CLK_EXT,
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CLK_HIGH_DIV,
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CLK_HIGH,
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} IMXClk;
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typedef struct IMXCCMClass {
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/* <private> */
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SysBusDeviceClass parent_class;
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/* <public> */
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uint32_t (*get_clock_frequency)(IMXCCMState *s, IMXClk clk);
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} IMXCCMClass;
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uint32_t imx_ccm_calc_pll(uint32_t pllreg, uint32_t base_freq);
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uint32_t imx_ccm_get_clock_frequency(IMXCCMState *s, IMXClk clock);
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#endif /* IMX_CCM_H */
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