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5b50e790f9
Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
84 lines
2.1 KiB
C
84 lines
2.1 KiB
C
/*
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* OpenRISC gdb server stub
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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* Copyright (c) 2013 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "config.h"
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#include "qemu-common.h"
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#include "exec/gdbstub.h"
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int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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OpenRISCCPU *cpu = OPENRISC_CPU(cs);
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CPUOpenRISCState *env = &cpu->env;
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if (n < 32) {
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return gdb_get_reg32(mem_buf, env->gpr[n]);
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} else {
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switch (n) {
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case 32: /* PPC */
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return gdb_get_reg32(mem_buf, env->ppc);
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case 33: /* NPC */
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return gdb_get_reg32(mem_buf, env->npc);
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case 34: /* SR */
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return gdb_get_reg32(mem_buf, env->sr);
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default:
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break;
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}
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}
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return 0;
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}
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int openrisc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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OpenRISCCPU *cpu = OPENRISC_CPU(cs);
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CPUClass *cc = CPU_GET_CLASS(cs);
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CPUOpenRISCState *env = &cpu->env;
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uint32_t tmp;
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if (n > cc->gdb_num_core_regs) {
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return 0;
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}
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tmp = ldl_p(mem_buf);
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if (n < 32) {
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env->gpr[n] = tmp;
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} else {
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switch (n) {
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case 32: /* PPC */
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env->ppc = tmp;
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break;
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case 33: /* NPC */
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env->npc = tmp;
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break;
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case 34: /* SR */
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env->sr = tmp;
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break;
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default:
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break;
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}
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}
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return 4;
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}
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