Dimitrije Nikolic ab77fc611b target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure ...

Add CP0_Config3 and CP0_Config5 to DisasContext structure. This is
needed for implementing availability control of various instructions.

Reviewed-by: "Aleksandar Markovic <amarkovic@wavecomp.com>"
Signed-off-by: "Aleksandar Markovic <amarkovic@wavecomp.com>"

2018-08-24 17:51:59 +02:00

..

cp0_timer.c

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cpu-qom.h

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cpu.c

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cpu.h

target/mips: Add CP0 BadInstrX register

2018-08-16 19:18:45 +02:00

dsp_helper.c

Remove unnecessary variables for function return value

2018-05-20 08:48:13 +03:00

gdbstub.c

target/mips: Fix gdbstub to read/write 64 bit FP registers

2018-06-27 20:13:50 +02:00

helper.c

target/mips: Don't update BadVAddr register in Debug Mode

2018-08-16 19:18:45 +02:00

helper.h

target/mips: Implement emulation of nanoMIPS ROTX instruction

2018-08-24 17:51:59 +02:00

internal.h

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kvm_mips.h

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kvm.c

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lmi_helper.c

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machine.c

target/mips: Add CP0 BadInstrX register

2018-08-16 19:18:45 +02:00

Makefile.objs

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mips-defs.h

target/mips: Add preprocessor constants for nanoMIPS

2018-08-24 17:51:59 +02:00

mips-semi.c

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msa_helper.c

target/mips: Remove floatX_maybe_silence_nan from conversions

2018-05-17 15:27:15 -07:00

op_helper.c

target/mips: Implement emulation of nanoMIPS ROTX instruction

2018-08-24 17:51:59 +02:00

TODO

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trace-events

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translate_init.inc.c

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translate.c

target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure

2018-08-24 17:51:59 +02:00