Aurelien Jarno ad153f153d target-mips: generate a reserved instruction exception on CPU without DSP ...

On CPU without DSP ASE support, a reserved instruction exception (instead of
a DSP ASE sate disabled) should be generated.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

2013-01-31 23:29:36 +01:00

..

cpu-qom.h

qom: move include files to include/qom/

2012-12-19 08:31:32 +01:00

cpu.c

cpu: Move cpu_index field to CPUState

2013-01-15 04:09:13 +01:00

cpu.h

target-mips: Allow DSP access to be disabled once enabled.

2013-01-08 11:49:01 +01:00

dsp_helper.c

target-mips: Fix helper and tests for dot/cross-dot product instructions

2013-01-08 11:58:43 +01:00

helper.c

target-mips: Add ASE DSP resources access check

2012-10-31 20:24:06 +01:00

helper.h

exec: move include files to include/exec/

2012-12-19 08:31:31 +01:00

lmi_helper.c

target-mips: Implement Loongson Multimedia Instructions

2012-09-19 21:40:48 +02:00

machine.c

…

Makefile.objs

target-mips: Add ASE DSP internal functions

2012-10-31 20:24:05 +01:00

mips-defs.h

…

op_helper.c

exec: Return CPUState from qemu_get_cpu()

2013-01-15 04:09:14 +01:00

TODO

target-mips: Change TODO file

2012-10-31 21:37:24 +01:00

translate_init.c

target-mips: Add ASE DSP processors

2012-10-31 21:37:20 +01:00

translate.c

target-mips: generate a reserved instruction exception on CPU without DSP

2013-01-31 23:29:36 +01:00