mirror of
https://github.com/xemu-project/xemu.git
synced 2025-02-22 05:24:14 +00:00

Commit 4cc35614a moved the exception mask bits out of env->uncached_cpsr and into env->daif. However the env->daif contents are AArch64 style mask bits, which include not just the AArch32 AIF bits but also the new D bit (masks debug exceptions). This means that when reconstructing the AArch32 CPSR value we must not allow the D bit in env->daif to get into the CPSR, because the corresponding bit in the CPSR is E, the endianness bit. This bug didn't affect execution under TCG because we don't implement endianness-swapping and so simply ignored the E bit; however it meant that kernel booting under KVM failed, because KVM does honour the E bit. Reported-by: Alexey Ignatov <lexszero@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
…
Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org - QEMU team
Description
Languages
C
82.5%
C++
7%
Python
3.3%
Dylan
2.8%
Shell
1.5%
Other
2.6%