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Currently the pseries machine emulation does not support DMA for emulated PCI devices, because the PAPR spec always requires a (guest visible, paravirtualized) IOMMU which was not implemented. Now that we have infrastructure for IOMMU emulation, we can correct this and allow PCI DMA for pseries. With the existing PAPR IOMMU code used for VIO devices, this is almost trivial. We use a single DMAContext for each (virtual) PCI host bridge, which is the usual configuration on real PAPR machines (which often have _many_ PCI host bridges). Cc: Alex Graf <agraf@suse.de> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
64 lines
1.9 KiB
C
64 lines
1.9 KiB
C
/*
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* QEMU SPAPR PCI BUS definitions
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*
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* Copyright (c) 2011 Alexey Kardashevskiy <aik@au1.ibm.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#if !defined(__HW_SPAPR_H__)
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#error Please include spapr.h before this file!
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#endif
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#if !defined(__HW_SPAPR_PCI_H__)
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#define __HW_SPAPR_PCI_H__
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#include "hw/pci.h"
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#include "hw/pci_host.h"
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#include "hw/xics.h"
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typedef struct sPAPRPHBState {
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SysBusDevice busdev;
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PCIHostState host_state;
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uint64_t buid;
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char *busname;
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char *dtbusname;
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MemoryRegion memspace, iospace;
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target_phys_addr_t mem_win_addr, mem_win_size, io_win_addr, io_win_size;
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MemoryRegion memwindow, iowindow;
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DMAContext *dma;
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struct {
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uint32_t dt_irq;
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qemu_irq qirq;
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} lsi_table[PCI_NUM_PINS];
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QLIST_ENTRY(sPAPRPHBState) list;
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} sPAPRPHBState;
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#define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL
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#define SPAPR_PCI_IO_WIN_SIZE 0x10000
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void spapr_create_phb(sPAPREnvironment *spapr,
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const char *busname, uint64_t buid,
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uint64_t mem_win_addr, uint64_t mem_win_size,
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uint64_t io_win_addr);
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int spapr_populate_pci_devices(sPAPRPHBState *phb,
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uint32_t xics_phandle,
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void *fdt);
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#endif /* __HW_SPAPR_PCI_H__ */
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