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.. and clean up not longer needed conditionals in DSTD build code pvpanic-isa AML will be fetched and included when ISA bridge will build its own AML code (including attached devices). Expected AML change: the device under separate _SB.PCI0.ISA scope is moved directly under Device(ISA) node. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20220608135340.3304695-29-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
138 lines
3.8 KiB
C
138 lines
3.8 KiB
C
/*
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* QEMU simulated pvpanic device.
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*
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* Copyright Fujitsu, Corp. 2013
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*
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* Authors:
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* Wen Congyang <wency@cn.fujitsu.com>
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* Hu Tao <hutao@cn.fujitsu.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#include "qemu/osdep.h"
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#include "qemu/module.h"
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#include "sysemu/runstate.h"
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#include "hw/nvram/fw_cfg.h"
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#include "hw/qdev-properties.h"
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#include "hw/misc/pvpanic.h"
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#include "qom/object.h"
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#include "hw/isa/isa.h"
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#include "standard-headers/linux/pvpanic.h"
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#include "hw/acpi/acpi_aml_interface.h"
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OBJECT_DECLARE_SIMPLE_TYPE(PVPanicISAState, PVPANIC_ISA_DEVICE)
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/*
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* PVPanicISAState for ISA device and
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* use ioport.
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*/
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struct PVPanicISAState {
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ISADevice parent_obj;
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uint16_t ioport;
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PVPanicState pvpanic;
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};
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static void pvpanic_isa_initfn(Object *obj)
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{
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PVPanicISAState *s = PVPANIC_ISA_DEVICE(obj);
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pvpanic_setup_io(&s->pvpanic, DEVICE(s), 1);
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}
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static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
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{
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ISADevice *d = ISA_DEVICE(dev);
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PVPanicISAState *s = PVPANIC_ISA_DEVICE(dev);
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PVPanicState *ps = &s->pvpanic;
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FWCfgState *fw_cfg = fw_cfg_find();
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uint16_t *pvpanic_port;
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if (!fw_cfg) {
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return;
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}
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pvpanic_port = g_malloc(sizeof(*pvpanic_port));
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*pvpanic_port = cpu_to_le16(s->ioport);
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fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
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sizeof(*pvpanic_port));
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isa_register_ioport(d, &ps->mr, s->ioport);
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}
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static void build_pvpanic_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
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{
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Aml *crs, *field, *method;
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PVPanicISAState *s = PVPANIC_ISA_DEVICE(adev);
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Aml *dev = aml_device("PEVT");
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aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
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crs = aml_resource_template();
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aml_append(crs,
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aml_io(AML_DECODE16, s->ioport, s->ioport, 1, 1)
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);
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(dev, aml_operation_region("PEOR", AML_SYSTEM_IO,
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aml_int(s->ioport), 1));
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field = aml_field("PEOR", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
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aml_append(field, aml_named_field("PEPT", 8));
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aml_append(dev, field);
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/* device present, functioning, decoding, shown in UI */
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aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
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method = aml_method("RDPT", 0, AML_NOTSERIALIZED);
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aml_append(method, aml_store(aml_name("PEPT"), aml_local(0)));
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aml_append(method, aml_return(aml_local(0)));
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aml_append(dev, method);
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method = aml_method("WRPT", 1, AML_NOTSERIALIZED);
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aml_append(method, aml_store(aml_arg(0), aml_name("PEPT")));
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aml_append(dev, method);
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aml_append(scope, dev);
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}
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static Property pvpanic_isa_properties[] = {
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DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
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DEFINE_PROP_UINT8("events", PVPanicISAState, pvpanic.events,
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PVPANIC_PANICKED | PVPANIC_CRASH_LOADED),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void pvpanic_isa_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
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dc->realize = pvpanic_isa_realizefn;
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device_class_set_props(dc, pvpanic_isa_properties);
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set_bit(DEVICE_CATEGORY_MISC, dc->categories);
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adevc->build_dev_aml = build_pvpanic_isa_aml;
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}
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static const TypeInfo pvpanic_isa_info = {
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.name = TYPE_PVPANIC_ISA_DEVICE,
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(PVPanicISAState),
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.instance_init = pvpanic_isa_initfn,
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.class_init = pvpanic_isa_class_init,
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.interfaces = (InterfaceInfo[]) {
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{ TYPE_ACPI_DEV_AML_IF },
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{ },
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},
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};
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static void pvpanic_register_types(void)
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{
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type_register_static(&pvpanic_isa_info);
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}
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type_init(pvpanic_register_types)
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