Peter Maydell b6c08970bc TriCore FPU patches ... -----BEGIN PGP SIGNATURE----- iQJTBAABCgA9FiEEbmNqfoPy3Qz6bm43CtLGOWtpyhQFAlh2NbsfHGtiYXN0aWFu QG1haWwudW5pLXBhZGVyYm9ybi5kZQAKCRAK0sY5a2nKFLuOEAC5twyd1sXr1lGZ NNY/QwxBteNiEFhzl4FtvOCiIUF5V/FEo7h1Bz1AHsGqaUWMKFdTtFO1dT8VWyl+ wQb0hnOtOiUxEl/UU35cviGzxr5iNWWUx/+yQezUrx7z8HBXUHpWgMbRvJSQ7ZpK Jjp/7zwbwtWjALTUPNOZZPWi7yYGSOXPIBHfSvsRx1KKC4o6hpQndm9uXOHUojf4 DPrGXWayieRQCmJOSeEOosVjU/e4bNOIdQU2/P3fV9MRPzqapG0U7NsVZfcqxiUY loEUKOe7jhNrVnwSqStCpdQlA2W1h0PoaXLc3kEw7D92S+rHk6pCDsHlq19bJvIV /KrymUmbbw5D5W/GNEtyXY6Q+x7hK+zQ2pvoPfG/NVXHBdEp1lT/qrKJQQJqfmLi j2qozmty1aBrYMYL34caeXoFILJVUxwiZ51DKN3Y/MOArPV/ehPUujKfIRksCRJd nu+kUur9aRR4tmb8XwjEVj2ewtJhOE6SUdxRUT/C+kAGUAzRqQcPgTMhcj8UvITl lyrMB69zh3s3U1FthGefLuy+7XSy/tg+slqeFmHpt6tlU6+eD//jk/m+ryC236jq fqUIXYrKZM9hG4/q6OsdM5HN2uVPKGtZTJUxkGl6uLeRZHrjLoeMQJ5VM624/mJx 6guBOiHSf4t+IgHuOumjTeIz5QaGuw== =80tR -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bkoppelmann/tags/pull-tricore-2017-01-11-2' into staging TriCore FPU patches # gpg: Signature made Wed 11 Jan 2017 13:40:11 GMT # gpg: using RSA key 0x0AD2C6396B69CA14 # gpg: Good signature from "Bastian Koppelmann <kbastian@mail.uni-paderborn.de>" # Primary key fingerprint: 6E63 6A7E 83F2 DD0C FA6E 6E37 0AD2 C639 6B69 CA14 * remotes/bkoppelmann/tags/pull-tricore-2017-01-11-2: target-tricore: Add updfl instruction target-tricore: Added new JNE instruction variant target-tricore: Added new MOV instruction variant target-tricore: Added MADD.F and MSUB.F instructions target-tricore: Added FTOUZ instruction Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2017-01-12 18:29:49 +00:00
..
alpha	target-alpha: Use ctpop helper	2017-01-10 08:48:56 -08:00
arm	target-arm: Use clrsb helper	2017-01-10 08:47:48 -08:00
cris	target-cris: Use clz opcode	2017-01-10 08:06:11 -08:00
i386	target-i386: Use ctpop helper	2017-01-10 08:49:59 -08:00
lm32	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
m68k	target-m68k: free TCG variables that are not	2016-12-27 18:28:40 +01:00
microblaze	target-microblaze: Use clz opcode	2017-01-10 08:06:11 -08:00
mips	target-mips: Use clz opcode	2017-01-10 08:06:11 -08:00
moxie	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
openrisc	target-openrisc: Use clz and ctz opcodes	2017-01-10 08:06:11 -08:00
ppc	target-ppc: Use ctpop helper	2017-01-10 08:48:57 -08:00
s390x	target-s390x: Avoid a loop for popcnt	2017-01-10 08:48:57 -08:00
sh4	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
sparc	target-sparc: Use ctpop helper	2017-01-10 08:49:55 -08:00
tilegx	target-tilegx: Use ctpop helper	2017-01-10 08:49:59 -08:00
tricore	TriCore FPU patches	2017-01-12 18:29:49 +00:00
unicore32	target-unicore32: Use clz opcode	2017-01-10 08:06:11 -08:00
xtensa	target-xtensa: Use clrsb helper	2017-01-10 08:47:48 -08:00