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Unlike the memory case, where "the destination operand receives a write cycle without regard to the result of the comparison", rm must not be touched altogether if the write fails, including not zero-extending it on 64-bit processors. This is not how the movcond currently works, because it is always followed by a gen_op_mov_reg_v to rm. To fix it, introduce a new function that is similar to gen_op_mov_reg_v but writes to a TCG temporary. Considering that gen_extu(ot, oldv) is not needed in the memory case either, the two cases for register and memory destinations are different enough that one might as well fuse the two "if (mod == 3)" into one. So do that too. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/508 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [rth: Add a test case ] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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aarch64 | ||
alpha | ||
arm | ||
cris | ||
hexagon | ||
hppa | ||
i386 | ||
loongarch64 | ||
m68k | ||
minilib | ||
mips | ||
multiarch | ||
nios2 | ||
openrisc | ||
ppc | ||
ppc64 | ||
ppc64le | ||
riscv64 | ||
s390x | ||
sh4 | ||
sparc64 | ||
tricore | ||
x86_64 | ||
xtensa | ||
Makefile.target | ||
README |
This directory contains various interesting guest programs for regression testing. Tests are either multi-arch, meaning they can be built for all guest architectures that support linux-user executable, or they are architecture specific. CRIS ==== The testsuite for CRIS is in tests/tcg/cris. You can run it with "make test-cris".