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An ICH9 southbridge contains several PCI devices, some of them with multiple functions. We model each function as a separate qdev. Two of them need some special wiring set up in pc_q35_init() to work: the LPC controller at 00:1f.0, and the SMBus controller at 00:1f.3. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de> |
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bitbang_i2c.c | ||
bitbang_i2c.h | ||
core.c | ||
exynos4210_i2c.c | ||
Makefile.objs | ||
omap_i2c.c | ||
pm_smbus.c | ||
smbus_eeprom.c | ||
smbus_ich9.c | ||
smbus.c | ||
versatile_i2c.c |