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c2cf139d9c
xemu/target
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Philippe Mathieu-Daudé c2cf139d9c cpu: Move AVR target vmsd field from CPUClass to DeviceClass 
See rationale in previous commit. Targets should use the vmsd field
of DeviceClass, not CPUClass. As migration is not important on the
AVR target, break the migration compatibility and set the DeviceClass
vmsd field. To feel safer, increment the vmstate version.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210517105140.1062037-14-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26 15:33:59 -07:00
..
alpha target/alpha: fix icount handling for timer instructions 2021-04-05 07:32:56 -07:00
arm cpu: Rename CPUClass vmsd -> legacy_vmsd 2021-05-26 15:33:59 -07:00
avr cpu: Move AVR target vmsd field from CPUClass to DeviceClass 2021-05-26 15:33:59 -07:00
cris target/cris: Plug leakage of TCG temporaries 2021-02-22 09:04:58 +01:00
hexagon Trivial patches pull request 20210503 2021-05-05 13:52:00 +01:00
hppa exec: Use cpu_untagged_addr in g2h; split out g2h_untagged 2021-02-16 11:04:53 +00:00
i386 cpu: Rename CPUClass vmsd -> legacy_vmsd 2021-05-26 15:33:59 -07:00
m68k Prepare MacOS ROM support: 2021-03-12 18:56:56 +00:00
microblaze cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
mips cpu: Rename CPUClass vmsd -> legacy_vmsd 2021-05-26 15:33:59 -07:00
nios2 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
openrisc Do not include sysemu/sysemu.h if it's not really necessary 2021-05-02 17:24:50 +02:00
ppc cpu: Rename CPUClass vmsd -> legacy_vmsd 2021-05-26 15:33:59 -07:00
riscv cpu: Rename CPUClass vmsd -> legacy_vmsd 2021-05-26 15:33:59 -07:00
rx Do not include sysemu/sysemu.h if it's not really necessary 2021-05-02 17:24:50 +02:00
s390x cpu: Rename CPUClass vmsd -> legacy_vmsd 2021-05-26 15:33:59 -07:00
sh4 cpu: Assert DeviceClass::vmsd is NULL on user emulation 2021-05-26 15:33:59 -07:00
sparc cpu: Rename CPUClass vmsd -> legacy_vmsd 2021-05-26 15:33:59 -07:00
tricore target/tricore: Fix OPC2_32_RRPW_EXTR for width=0 2021-03-14 14:49:01 +01:00
xtensa cpu: Assert DeviceClass::vmsd is NULL on user emulation 2021-05-26 15:33:59 -07:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00