Mark Cave-Ayland 25c5d5acfb sun4u: implement power device ... This inbuilt device contains a single 4-byte register, of which bit 24 is used to power down the machine on a real Ultra 5. The power device exists at offset 0x724000 on a real machine, but due to the current configuration of the BARs in QEMU it must be located lower in PCI IO space. For the moment we place the power device at offset 0x7240 as a reminder of its original location and raise the base PCI IO address from 0x4000 to 0x8000. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>		2018-01-25 13:39:39 +00:00
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Makefile.objs	sun4u: split IOMMU device out from apb.c to sun4u_iommu.c	2018-01-09 21:48:20 +00:00
niagara.c	sparc: sun4u/sun4v/niagara: use generic cpu_model parsing	2017-10-27 16:04:27 +02:00
sparc64.c	sparc64: convert hw/sparc64/sparc64.c from DPRINTF macros to trace events	2018-01-25 13:39:34 +00:00
sun4u_iommu.c	sun4u_iommu: add trace event for IOMMU translations	2018-01-09 21:48:20 +00:00
sun4u.c	sun4u: implement power device	2018-01-25 13:39:39 +00:00
trace-events	sparc64: convert hw/sparc64/sparc64.c from DPRINTF macros to trace events	2018-01-25 13:39:34 +00:00