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a010bdbe71
Instead of passing a pointer to memory now just extend the GByteArray to all the read register helpers. They can then safely append their data through the normal way. We don't bother with this abstraction for write registers as we have already ensured the buffer being copied from is the correct size. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com> Message-Id: <20200316172155.971-15-alex.bennee@linaro.org>
341 lines
9.7 KiB
C
341 lines
9.7 KiB
C
/*
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* s390x gdb server stub
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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* Copyright (c) 2013 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "internal.h"
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#include "exec/exec-all.h"
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#include "exec/gdbstub.h"
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#include "qemu/bitops.h"
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#include "sysemu/hw_accel.h"
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#include "sysemu/tcg.h"
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int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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{
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S390CPU *cpu = S390_CPU(cs);
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CPUS390XState *env = &cpu->env;
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uint64_t val;
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int cc_op;
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switch (n) {
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case S390_PSWM_REGNUM:
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if (tcg_enabled()) {
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cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst,
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env->cc_vr);
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val = deposit64(env->psw.mask, 44, 2, cc_op);
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return gdb_get_regl(mem_buf, val);
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}
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return gdb_get_regl(mem_buf, env->psw.mask);
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case S390_PSWA_REGNUM:
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return gdb_get_regl(mem_buf, env->psw.addr);
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case S390_R0_REGNUM ... S390_R15_REGNUM:
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return gdb_get_regl(mem_buf, env->regs[n - S390_R0_REGNUM]);
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}
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return 0;
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}
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int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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S390CPU *cpu = S390_CPU(cs);
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CPUS390XState *env = &cpu->env;
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target_ulong tmpl = ldtul_p(mem_buf);
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switch (n) {
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case S390_PSWM_REGNUM:
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env->psw.mask = tmpl;
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if (tcg_enabled()) {
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env->cc_op = extract64(tmpl, 44, 2);
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}
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break;
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case S390_PSWA_REGNUM:
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env->psw.addr = tmpl;
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break;
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case S390_R0_REGNUM ... S390_R15_REGNUM:
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env->regs[n - S390_R0_REGNUM] = tmpl;
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break;
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default:
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return 0;
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}
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return 8;
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}
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/* the values represent the positions in s390-acr.xml */
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#define S390_A0_REGNUM 0
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#define S390_A15_REGNUM 15
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/* total number of registers in s390-acr.xml */
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#define S390_NUM_AC_REGS 16
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static int cpu_read_ac_reg(CPUS390XState *env, GByteArray *buf, int n)
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{
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switch (n) {
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case S390_A0_REGNUM ... S390_A15_REGNUM:
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return gdb_get_reg32(buf, env->aregs[n]);
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default:
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return 0;
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}
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}
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static int cpu_write_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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switch (n) {
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case S390_A0_REGNUM ... S390_A15_REGNUM:
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env->aregs[n] = ldl_p(mem_buf);
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cpu_synchronize_post_init(env_cpu(env));
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return 4;
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default:
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return 0;
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}
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}
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/* the values represent the positions in s390-fpr.xml */
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#define S390_FPC_REGNUM 0
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#define S390_F0_REGNUM 1
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#define S390_F15_REGNUM 16
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/* total number of registers in s390-fpr.xml */
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#define S390_NUM_FP_REGS 17
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static int cpu_read_fp_reg(CPUS390XState *env, GByteArray *buf, int n)
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{
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switch (n) {
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case S390_FPC_REGNUM:
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return gdb_get_reg32(buf, env->fpc);
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case S390_F0_REGNUM ... S390_F15_REGNUM:
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return gdb_get_reg64(buf, *get_freg(env, n - S390_F0_REGNUM));
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default:
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return 0;
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}
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}
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static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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switch (n) {
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case S390_FPC_REGNUM:
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env->fpc = ldl_p(mem_buf);
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return 4;
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case S390_F0_REGNUM ... S390_F15_REGNUM:
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*get_freg(env, n - S390_F0_REGNUM) = ldtul_p(mem_buf);
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return 8;
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default:
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return 0;
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}
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}
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/* the values represent the positions in s390-vx.xml */
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#define S390_V0L_REGNUM 0
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#define S390_V15L_REGNUM 15
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#define S390_V16_REGNUM 16
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#define S390_V31_REGNUM 31
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/* total number of registers in s390-vx.xml */
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#define S390_NUM_VREGS 32
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static int cpu_read_vreg(CPUS390XState *env, GByteArray *buf, int n)
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{
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int ret;
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switch (n) {
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case S390_V0L_REGNUM ... S390_V15L_REGNUM:
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ret = gdb_get_reg64(buf, env->vregs[n][1]);
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break;
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case S390_V16_REGNUM ... S390_V31_REGNUM:
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ret = gdb_get_reg64(buf, env->vregs[n][0]);
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ret += gdb_get_reg64(buf, env->vregs[n][1]);
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break;
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default:
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ret = 0;
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}
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return ret;
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}
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static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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switch (n) {
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case S390_V0L_REGNUM ... S390_V15L_REGNUM:
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env->vregs[n][1] = ldtul_p(mem_buf + 8);
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return 8;
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case S390_V16_REGNUM ... S390_V31_REGNUM:
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env->vregs[n][0] = ldtul_p(mem_buf);
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env->vregs[n][1] = ldtul_p(mem_buf + 8);
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return 16;
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default:
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return 0;
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}
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}
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/* the values represent the positions in s390-cr.xml */
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#define S390_C0_REGNUM 0
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#define S390_C15_REGNUM 15
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/* total number of registers in s390-cr.xml */
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#define S390_NUM_C_REGS 16
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#ifndef CONFIG_USER_ONLY
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static int cpu_read_c_reg(CPUS390XState *env, GByteArray *buf, int n)
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{
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switch (n) {
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case S390_C0_REGNUM ... S390_C15_REGNUM:
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return gdb_get_regl(buf, env->cregs[n]);
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default:
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return 0;
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}
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}
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static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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switch (n) {
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case S390_C0_REGNUM ... S390_C15_REGNUM:
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env->cregs[n] = ldtul_p(mem_buf);
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if (tcg_enabled()) {
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tlb_flush(env_cpu(env));
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}
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cpu_synchronize_post_init(env_cpu(env));
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return 8;
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default:
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return 0;
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}
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}
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/* the values represent the positions in s390-virt.xml */
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#define S390_VIRT_CKC_REGNUM 0
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#define S390_VIRT_CPUTM_REGNUM 1
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#define S390_VIRT_BEA_REGNUM 2
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#define S390_VIRT_PREFIX_REGNUM 3
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#define S390_VIRT_PP_REGNUM 4
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#define S390_VIRT_PFT_REGNUM 5
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#define S390_VIRT_PFS_REGNUM 6
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#define S390_VIRT_PFC_REGNUM 7
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/* total number of registers in s390-virt.xml */
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#define S390_NUM_VIRT_REGS 8
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static int cpu_read_virt_reg(CPUS390XState *env, GByteArray *mem_buf, int n)
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{
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switch (n) {
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case S390_VIRT_CKC_REGNUM:
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return gdb_get_regl(mem_buf, env->ckc);
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case S390_VIRT_CPUTM_REGNUM:
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return gdb_get_regl(mem_buf, env->cputm);
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case S390_VIRT_BEA_REGNUM:
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return gdb_get_regl(mem_buf, env->gbea);
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case S390_VIRT_PREFIX_REGNUM:
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return gdb_get_regl(mem_buf, env->psa);
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case S390_VIRT_PP_REGNUM:
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return gdb_get_regl(mem_buf, env->pp);
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case S390_VIRT_PFT_REGNUM:
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return gdb_get_regl(mem_buf, env->pfault_token);
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case S390_VIRT_PFS_REGNUM:
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return gdb_get_regl(mem_buf, env->pfault_select);
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case S390_VIRT_PFC_REGNUM:
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return gdb_get_regl(mem_buf, env->pfault_compare);
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default:
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return 0;
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}
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}
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static int cpu_write_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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switch (n) {
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case S390_VIRT_CKC_REGNUM:
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env->ckc = ldtul_p(mem_buf);
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cpu_synchronize_post_init(env_cpu(env));
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return 8;
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case S390_VIRT_CPUTM_REGNUM:
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env->cputm = ldtul_p(mem_buf);
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cpu_synchronize_post_init(env_cpu(env));
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return 8;
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case S390_VIRT_BEA_REGNUM:
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env->gbea = ldtul_p(mem_buf);
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cpu_synchronize_post_init(env_cpu(env));
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return 8;
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case S390_VIRT_PREFIX_REGNUM:
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env->psa = ldtul_p(mem_buf);
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cpu_synchronize_post_init(env_cpu(env));
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return 8;
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case S390_VIRT_PP_REGNUM:
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env->pp = ldtul_p(mem_buf);
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cpu_synchronize_post_init(env_cpu(env));
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return 8;
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case S390_VIRT_PFT_REGNUM:
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env->pfault_token = ldtul_p(mem_buf);
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cpu_synchronize_post_init(env_cpu(env));
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return 8;
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case S390_VIRT_PFS_REGNUM:
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env->pfault_select = ldtul_p(mem_buf);
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cpu_synchronize_post_init(env_cpu(env));
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return 8;
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case S390_VIRT_PFC_REGNUM:
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env->pfault_compare = ldtul_p(mem_buf);
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cpu_synchronize_post_init(env_cpu(env));
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return 8;
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default:
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return 0;
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}
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}
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#endif
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/* the values represent the positions in s390-gs.xml */
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#define S390_GS_RESERVED_REGNUM 0
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#define S390_GS_GSD_REGNUM 1
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#define S390_GS_GSSM_REGNUM 2
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#define S390_GS_GSEPLA_REGNUM 3
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/* total number of registers in s390-gs.xml */
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#define S390_NUM_GS_REGS 4
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static int cpu_read_gs_reg(CPUS390XState *env, GByteArray *buf, int n)
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{
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return gdb_get_regl(buf, env->gscb[n]);
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}
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static int cpu_write_gs_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
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{
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env->gscb[n] = ldtul_p(mem_buf);
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cpu_synchronize_post_init(env_cpu(env));
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return 8;
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}
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void s390_cpu_gdb_init(CPUState *cs)
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{
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gdb_register_coprocessor(cs, cpu_read_ac_reg,
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cpu_write_ac_reg,
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S390_NUM_AC_REGS, "s390-acr.xml", 0);
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gdb_register_coprocessor(cs, cpu_read_fp_reg,
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cpu_write_fp_reg,
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S390_NUM_FP_REGS, "s390-fpr.xml", 0);
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gdb_register_coprocessor(cs, cpu_read_vreg,
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cpu_write_vreg,
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S390_NUM_VREGS, "s390-vx.xml", 0);
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gdb_register_coprocessor(cs, cpu_read_gs_reg,
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cpu_write_gs_reg,
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S390_NUM_GS_REGS, "s390-gs.xml", 0);
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#ifndef CONFIG_USER_ONLY
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gdb_register_coprocessor(cs, cpu_read_c_reg,
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cpu_write_c_reg,
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S390_NUM_C_REGS, "s390-cr.xml", 0);
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if (kvm_enabled()) {
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gdb_register_coprocessor(cs, cpu_read_virt_reg,
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cpu_write_virt_reg,
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S390_NUM_VIRT_REGS, "s390-virt.xml", 0);
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}
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#endif
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}
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