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c227f0995e
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Something
like this _must_ be presented on the list first so people can provide input
and cope with it.
This reverts commit 99a0949b72
.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
337 lines
9.3 KiB
C
337 lines
9.3 KiB
C
/*
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* Intel PXA27X Keypad Controller emulation.
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*
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* Copyright (c) 2007 MontaVista Software, Inc
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* Written by Armin Kuster <akuster@kama-aina.net>
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* or <Akuster@mvista.com>
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*
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* This code is licensed under the GPLv2.
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*/
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#include "hw.h"
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#include "pxa.h"
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#include "console.h"
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/*
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* Keypad
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*/
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#define KPC 0x00 /* Keypad Interface Control register */
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#define KPDK 0x08 /* Keypad Interface Direct Key register */
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#define KPREC 0x10 /* Keypad Interface Rotary Encoder register */
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#define KPMK 0x18 /* Keypad Interface Matrix Key register */
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#define KPAS 0x20 /* Keypad Interface Automatic Scan register */
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#define KPASMKP0 0x28 /* Keypad Interface Automatic Scan Multiple
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Key Presser register 0 */
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#define KPASMKP1 0x30 /* Keypad Interface Automatic Scan Multiple
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Key Presser register 1 */
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#define KPASMKP2 0x38 /* Keypad Interface Automatic Scan Multiple
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Key Presser register 2 */
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#define KPASMKP3 0x40 /* Keypad Interface Automatic Scan Multiple
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Key Presser register 3 */
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#define KPKDI 0x48 /* Keypad Interface Key Debounce Interval
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register */
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/* Keypad defines */
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#define KPC_AS (0x1 << 30) /* Automatic Scan bit */
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#define KPC_ASACT (0x1 << 29) /* Automatic Scan on Activity */
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#define KPC_MI (0x1 << 22) /* Matrix interrupt bit */
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#define KPC_IMKP (0x1 << 21) /* Ignore Multiple Key Press */
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#define KPC_MS7 (0x1 << 20) /* Matrix scan line 7 */
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#define KPC_MS6 (0x1 << 19) /* Matrix scan line 6 */
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#define KPC_MS5 (0x1 << 18) /* Matrix scan line 5 */
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#define KPC_MS4 (0x1 << 17) /* Matrix scan line 4 */
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#define KPC_MS3 (0x1 << 16) /* Matrix scan line 3 */
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#define KPC_MS2 (0x1 << 15) /* Matrix scan line 2 */
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#define KPC_MS1 (0x1 << 14) /* Matrix scan line 1 */
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#define KPC_MS0 (0x1 << 13) /* Matrix scan line 0 */
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#define KPC_ME (0x1 << 12) /* Matrix Keypad Enable */
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#define KPC_MIE (0x1 << 11) /* Matrix Interrupt Enable */
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#define KPC_DK_DEB_SEL (0x1 << 9) /* Direct Keypad Debounce Select */
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#define KPC_DI (0x1 << 5) /* Direct key interrupt bit */
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#define KPC_RE_ZERO_DEB (0x1 << 4) /* Rotary Encoder Zero Debounce */
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#define KPC_REE1 (0x1 << 3) /* Rotary Encoder1 Enable */
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#define KPC_REE0 (0x1 << 2) /* Rotary Encoder0 Enable */
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#define KPC_DE (0x1 << 1) /* Direct Keypad Enable */
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#define KPC_DIE (0x1 << 0) /* Direct Keypad interrupt Enable */
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#define KPDK_DKP (0x1 << 31)
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#define KPDK_DK7 (0x1 << 7)
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#define KPDK_DK6 (0x1 << 6)
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#define KPDK_DK5 (0x1 << 5)
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#define KPDK_DK4 (0x1 << 4)
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#define KPDK_DK3 (0x1 << 3)
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#define KPDK_DK2 (0x1 << 2)
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#define KPDK_DK1 (0x1 << 1)
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#define KPDK_DK0 (0x1 << 0)
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#define KPREC_OF1 (0x1 << 31)
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#define KPREC_UF1 (0x1 << 30)
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#define KPREC_OF0 (0x1 << 15)
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#define KPREC_UF0 (0x1 << 14)
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#define KPMK_MKP (0x1 << 31)
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#define KPAS_SO (0x1 << 31)
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#define KPASMKPx_SO (0x1 << 31)
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#define KPASMKPx_MKC(row, col) (1 << (row + 16 * (col % 2)))
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#define PXAKBD_MAXROW 8
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#define PXAKBD_MAXCOL 8
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struct PXA2xxKeyPadState {
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qemu_irq irq;
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struct keymap *map;
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uint32_t kpc;
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uint32_t kpdk;
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uint32_t kprec;
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uint32_t kpmk;
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uint32_t kpas;
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uint32_t kpasmkp0;
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uint32_t kpasmkp1;
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uint32_t kpasmkp2;
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uint32_t kpasmkp3;
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uint32_t kpkdi;
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};
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static void pxa27x_keyboard_event (PXA2xxKeyPadState *kp, int keycode)
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{
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int row, col,rel;
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if(!(kp->kpc & KPC_ME)) /* skip if not enabled */
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return;
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if(kp->kpc & KPC_AS || kp->kpc & KPC_ASACT) {
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if(kp->kpc & KPC_AS)
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kp->kpc &= ~(KPC_AS);
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rel = (keycode & 0x80) ? 1 : 0; /* key release from qemu */
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keycode &= ~(0x80); /* strip qemu key release bit */
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row = kp->map[keycode].row;
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col = kp->map[keycode].column;
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if(row == -1 || col == -1)
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return;
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switch (col) {
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case 0:
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case 1:
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if(rel)
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kp->kpasmkp0 = ~(0xffffffff);
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else
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kp->kpasmkp0 |= KPASMKPx_MKC(row,col);
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break;
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case 2:
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case 3:
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if(rel)
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kp->kpasmkp1 = ~(0xffffffff);
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else
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kp->kpasmkp1 |= KPASMKPx_MKC(row,col);
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break;
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case 4:
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case 5:
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if(rel)
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kp->kpasmkp2 = ~(0xffffffff);
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else
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kp->kpasmkp2 |= KPASMKPx_MKC(row,col);
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break;
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case 6:
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case 7:
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if(rel)
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kp->kpasmkp3 = ~(0xffffffff);
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else
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kp->kpasmkp3 |= KPASMKPx_MKC(row,col);
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break;
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} /* switch */
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goto out;
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}
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return;
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out:
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if(kp->kpc & KPC_MIE) {
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kp->kpc |= KPC_MI;
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qemu_irq_raise(kp->irq);
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}
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return;
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}
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static uint32_t pxa2xx_keypad_read(void *opaque, target_phys_addr_t offset)
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{
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PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
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uint32_t tmp;
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switch (offset) {
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case KPC:
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tmp = s->kpc;
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if(tmp & KPC_MI)
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s->kpc &= ~(KPC_MI);
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if(tmp & KPC_DI)
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s->kpc &= ~(KPC_DI);
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qemu_irq_lower(s->irq);
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return tmp;
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break;
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case KPDK:
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return s->kpdk;
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break;
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case KPREC:
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tmp = s->kprec;
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if(tmp & KPREC_OF1)
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s->kprec &= ~(KPREC_OF1);
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if(tmp & KPREC_UF1)
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s->kprec &= ~(KPREC_UF1);
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if(tmp & KPREC_OF0)
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s->kprec &= ~(KPREC_OF0);
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if(tmp & KPREC_UF0)
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s->kprec &= ~(KPREC_UF0);
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return tmp;
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break;
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case KPMK:
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tmp = s->kpmk;
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if(tmp & KPMK_MKP)
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s->kpmk &= ~(KPMK_MKP);
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return tmp;
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break;
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case KPAS:
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return s->kpas;
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break;
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case KPASMKP0:
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return s->kpasmkp0;
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break;
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case KPASMKP1:
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return s->kpasmkp1;
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break;
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case KPASMKP2:
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return s->kpasmkp2;
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break;
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case KPASMKP3:
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return s->kpasmkp3;
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break;
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case KPKDI:
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return s->kpkdi;
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break;
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default:
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hw_error("%s: Bad offset " REG_FMT "\n", __FUNCTION__, offset);
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}
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return 0;
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}
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static void pxa2xx_keypad_write(void *opaque,
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target_phys_addr_t offset, uint32_t value)
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{
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PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
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switch (offset) {
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case KPC:
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s->kpc = value;
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break;
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case KPDK:
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s->kpdk = value;
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break;
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case KPREC:
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s->kprec = value;
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break;
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case KPMK:
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s->kpmk = value;
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break;
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case KPAS:
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s->kpas = value;
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break;
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case KPASMKP0:
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s->kpasmkp0 = value;
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break;
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case KPASMKP1:
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s->kpasmkp1 = value;
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break;
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case KPASMKP2:
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s->kpasmkp2 = value;
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break;
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case KPASMKP3:
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s->kpasmkp3 = value;
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break;
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case KPKDI:
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s->kpkdi = value;
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break;
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default:
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hw_error("%s: Bad offset " REG_FMT "\n", __FUNCTION__, offset);
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}
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}
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static CPUReadMemoryFunc * const pxa2xx_keypad_readfn[] = {
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pxa2xx_keypad_read,
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pxa2xx_keypad_read,
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pxa2xx_keypad_read
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};
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static CPUWriteMemoryFunc * const pxa2xx_keypad_writefn[] = {
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pxa2xx_keypad_write,
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pxa2xx_keypad_write,
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pxa2xx_keypad_write
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};
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static void pxa2xx_keypad_save(QEMUFile *f, void *opaque)
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{
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PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
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qemu_put_be32s(f, &s->kpc);
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qemu_put_be32s(f, &s->kpdk);
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qemu_put_be32s(f, &s->kprec);
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qemu_put_be32s(f, &s->kpmk);
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qemu_put_be32s(f, &s->kpas);
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qemu_put_be32s(f, &s->kpasmkp0);
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qemu_put_be32s(f, &s->kpasmkp1);
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qemu_put_be32s(f, &s->kpasmkp2);
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qemu_put_be32s(f, &s->kpasmkp3);
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qemu_put_be32s(f, &s->kpkdi);
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}
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static int pxa2xx_keypad_load(QEMUFile *f, void *opaque, int version_id)
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{
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PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
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qemu_get_be32s(f, &s->kpc);
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qemu_get_be32s(f, &s->kpdk);
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qemu_get_be32s(f, &s->kprec);
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qemu_get_be32s(f, &s->kpmk);
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qemu_get_be32s(f, &s->kpas);
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qemu_get_be32s(f, &s->kpasmkp0);
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qemu_get_be32s(f, &s->kpasmkp1);
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qemu_get_be32s(f, &s->kpasmkp2);
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qemu_get_be32s(f, &s->kpasmkp3);
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qemu_get_be32s(f, &s->kpkdi);
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return 0;
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}
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PXA2xxKeyPadState *pxa27x_keypad_init(target_phys_addr_t base,
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qemu_irq irq)
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{
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int iomemtype;
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PXA2xxKeyPadState *s;
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s = (PXA2xxKeyPadState *) qemu_mallocz(sizeof(PXA2xxKeyPadState));
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s->irq = irq;
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iomemtype = cpu_register_io_memory(pxa2xx_keypad_readfn,
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pxa2xx_keypad_writefn, s);
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cpu_register_physical_memory(base, 0x00100000, iomemtype);
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register_savevm("pxa2xx_keypad", 0, 0,
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pxa2xx_keypad_save, pxa2xx_keypad_load, s);
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return s;
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}
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void pxa27x_register_keypad(PXA2xxKeyPadState *kp, struct keymap *map,
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int size)
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{
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if(!map || size < 0x80) {
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fprintf(stderr, "%s - No PXA keypad map defined\n", __FUNCTION__);
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exit(-1);
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}
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kp->map = map;
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qemu_add_kbd_event_handler((QEMUPutKBDEvent *) pxa27x_keyboard_event, kp);
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}
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