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xemu/include/hw/gpio
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Havard Skinnemoen 526dbbe087 hw/gpio: Add GPIO model for Nuvoton NPCM7xx 
The NPCM7xx chips have multiple GPIO controllers that are mostly
identical except for some minor differences like the reset values of
some registers. Each controller controls up to 32 pins.

Each individual pin is modeled as a pair of unnamed GPIOs -- one for
emitting the actual pin state, and one for driving the pin externally.
Like the nRF51 GPIO controller, a gpio level may be negative, which
means the pin is not driven, or floating.

Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27 11:10:32 +00:00
..
aspeed_gpio.h Use OBJECT_DECLARE_TYPE when possible 2020-09-18 14:12:32 -04:00
bcm2835_gpio.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
imx_gpio.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
npcm7xx_gpio.h hw/gpio: Add GPIO model for Nuvoton NPCM7xx 2020-10-27 11:10:32 +00:00
nrf51_gpio.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
sifive_gpio.h sifive: Use DECLARE_*CHECKER* macros 2020-09-18 13:49:48 -04:00