blueswir1 d07b4d0ea7 Fix MXCC register 64 bit read word order (Robert Reif) ...

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162

2007-11-19 19:14:10 +00:00

..

cpu.h

added cpu_model parameter to cpu_init()

2007-11-10 15:15:54 +00:00

exec.h

Replace is_user variable with mmu_idx in softmmu core,

2007-10-14 07:07:08 +00:00

fbranch_template.h

sparc64 marge (Blue Swirl)

2005-07-02 14:31:34 +00:00

fop_template.h

find -type f | xargs sed -i 's/[\t ]$//g' # on most files

2007-09-16 21:08:06 +00:00

helper.c

Break up vl.h.

2007-11-17 17:14:51 +00:00

op_helper.c

Fix MXCC register 64 bit read word order (Robert Reif)

2007-11-19 19:14:10 +00:00

op_mem.h

Use ldq and stq for 8 byte accesses (original patch by Robert Reif)

2007-10-17 17:37:13 +00:00

op_template.h

find -type f | xargs sed -i 's/[\t ]$//g' # on most files

2007-09-16 21:08:06 +00:00

op.c

Fix compiling Sparc64 on PPC host

2007-10-20 07:07:47 +00:00

translate.c

added cpu_model parameter to cpu_init()

2007-11-10 15:15:54 +00:00