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The aim of this is to test code generation for vectorised operations. Unfortunately gcc struggles to do much with the messy sha1 code (try -fopt-info-vec-missed to see why). However it's better than nothing. We assume the non-vectorised output is gold and baring compiler bugs the outputs should match. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220225172021.3493923-12-alex.bennee@linaro.org> |
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.. | ||
commpage.c | ||
fcvt.c | ||
fcvt.ref | ||
float_convs.ref | ||
float_madds.ref | ||
hello-arm.c | ||
Makefile.softmmu-target | ||
Makefile.target | ||
pcalign-a32.c | ||
README | ||
semicall.h | ||
test-arm-iwmmxt.S | ||
test-armv6m-undef.ld | ||
test-armv6m-undef.S |
These are ARM specific guest programs hello-arm --------- A very simple inline assembly, write syscall based hello world test-arm-iwmmxt --------------- A simple test case for older iwmmxt extended ARMs