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cab86dea1d
Call the CHECK_NOSHUF macro multiple times: once in the
fGEN_TCG_PRED_LOAD() and again in fLOAD().
Before this commit, a packet with a store and a predicated
load with mem_noshuf that gets encoded like this:
{ P0 = cmp.eq(R17,#0x0)
memw(R18+#0x0) = R2
if (!P0.new) R3 = memw(R17+#0x4) }
... would end up generating a branch over both the load
and the store like so:
...
brcond_i32 loc17,$0x0,eq,$L1
mov_i32 loc18,store_addr_1
qemu_st_i32 store_val32_1,store_addr_1,leul,0
qemu_ld_i32 loc16,loc7,leul,0
set_label $L1
...
Test cases added to tests/tcg/hexagon/mem_noshuf.c
Co-authored-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220707210546.15985-2-tsimpson@quicinc.com>
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| .. | ||
| aarch64 | ||
| alpha | ||
| arm | ||
| cris | ||
| hexagon | ||
| hppa | ||
| i386 | ||
| loongarch64 | ||
| m68k | ||
| minilib | ||
| mips | ||
| multiarch | ||
| nios2 | ||
| openrisc | ||
| ppc | ||
| ppc64 | ||
| ppc64le | ||
| riscv64 | ||
| s390x | ||
| sh4 | ||
| sparc64 | ||
| tricore | ||
| x86_64 | ||
| xtensa | ||
| Makefile.target | ||
| README | ||
This directory contains various interesting guest programs for regression testing. Tests are either multi-arch, meaning they can be built for all guest architectures that support linux-user executable, or they are architecture specific. CRIS ==== The testsuite for CRIS is in tests/tcg/cris. You can run it with "make test-cris".