xemu-project/xemu
1
0
Fork 0
mirror of https://github.com/xemu-project/xemu.git synced 2024-12-01 07:21:09 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
cc8b6e76e3
xemu/target-ppc/translate
History
Nikunj A Dadhania cc8b6e76e3 target-ppc: implement vnegw/d instructions 
Vector Integer Negate Instructions:

vnegw: Vector Negate Word
vnegd: Vector Negate Doubleword

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-28 09:36:58 +11:00
..
dfp-impl.inc.c ppc: Rename #include'd .c files to .inc.c 2016-09-07 12:40:12 +10:00
dfp-ops.inc.c ppc: Rename #include'd .c files to .inc.c 2016-09-07 12:40:12 +10:00
fp-impl.inc.c target-ppc: convert st64 to use new macro 2016-09-23 10:29:40 +10:00
fp-ops.inc.c target-ppc: convert st64 to use new macro 2016-09-23 10:29:40 +10:00
spe-impl.inc.c target-ppc: convert st64 to use new macro 2016-09-23 10:29:40 +10:00
spe-ops.inc.c ppc: Rename #include'd .c files to .inc.c 2016-09-07 12:40:12 +10:00
vmx-impl.inc.c target-ppc: implement vnegw/d instructions 2016-10-28 09:36:58 +11:00
vmx-ops.inc.c target-ppc: implement vnegw/d instructions 2016-10-28 09:36:58 +11:00
vsx-impl.inc.c target-ppc: Implement mtvsrws instruction 2016-10-05 11:05:28 +11:00
vsx-ops.inc.c target-ppc: Implement mtvsrws instruction 2016-10-05 11:05:28 +11:00