Rémi Denis-Courmont cc974d5cd8 target/arm: remove redundant tests ... In this context, the HCR value is the effective value, and thus is zero in secure mode. The tests for HCR.{F,I}MO are sufficient. Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210112104511.36576-1-remi.denis.courmont@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2021-01-19 14:38:51 +00:00
..
alpha
arm	target/arm: remove redundant tests	2021-01-19 14:38:51 +00:00
avr	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
cris
hppa	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
i386	target/i386: Use X86Seg enum for segment registers	2021-01-12 17:05:10 +01:00
lm32
m68k	gdbstub: drop CPUEnv from gdb_exit()	2021-01-18 10:05:06 +00:00
microblaze	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
mips	target/mips: Remove vendor specific CPU definitions	2021-01-14 17:13:54 +01:00
moxie
nios2	gdbstub: drop CPUEnv from gdb_exit()	2021-01-18 10:05:06 +00:00
openrisc
ppc
riscv	Testing, gdbstub and semihosting patches:	2021-01-18 12:10:20 +00:00
rx	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
s390x	Remove superfluous timer_del() calls	2021-01-08 15:13:38 +00:00
sh4	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
sparc	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
tilegx
tricore	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
unicore32
xtensa
meson.build