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xemu/target-mips
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Nathan Froyd fa31af0e63 target-mips: fix conditional moves off fp condition codes 
Conditional moves off fp condition codes were using the result of
get_fp_bit to isolate and test the relevant condition code.  However,
get_fp_bit returns the bit number of the condition code, not a
bitmask.  (Compare the use of get_fp_bit in gen_compute_branch1, for
instance.)

Fixed by shifting a bitmask into place using the result of get_fp_bit in
the relevant functions (gen_mov{ci,cf_s,cf_d,cf_ps}).

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-08-25 18:05:27 +02:00
..
cpu.h cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal 2009-08-24 08:21:42 -05:00
exec.h qemu: per-arch cpu_has_work (Marcelo Tosatti) 2009-04-24 18:03:20 +00:00
helper.c Update to a hopefully more future proof FSF address 2009-07-16 20:47:01 +00:00
helper.h target-mips: use the TCG_CALL_PURE and TCG_CALL_CONST for some helpers 2009-04-06 12:34:07 +00:00
machine.c Fix a warning: uint_fast8_t is not 8 bits on OpenBSD/Sparc64 2009-06-13 15:09:38 +00:00
mips-defs.h Hardware convenience library 2009-05-19 16:17:58 +01:00
op_helper.c Update to a hopefully more future proof FSF address 2009-07-16 20:47:01 +00:00
TODO Move the active FPU registers into env again, and use more TCG registers 2008-09-18 11:57:27 +00:00
translate_init.c Update to a hopefully more future proof FSF address 2009-07-16 20:47:01 +00:00
translate.c target-mips: fix conditional moves off fp condition codes 2009-08-25 18:05:27 +02:00