Peter Maydell d8276573da Add CPUClass::tlb_fill. ... Improve tlb_vaddr_to_host for use by ARM SVE no-fault loads. -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAlzVx4UdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+U1Af/b3cV5d5a1LWRdLgR 71JCPK/M3o43r2U9wCSikteXkmNBEdEoc5+WRk2SuZFLW/JB1DHDY7/gISPIhfoB ZIza2TxD/QK1CQ5/mMWruKBlyygbYYZgsYaaNsMJRJgicgOSjTN0nuHMbIfv3tAN mu+IlkD0LdhVjP0fz30Jpew3b3575RCjYxEPM6KQI3RxtQFjZ3FhqV5hKR4vtdP5 yLWJQzwAbaCB3SZUvvp7TN1ZsmeyLpc+Yz/YtRTqQedo7SNWWBKldLhqq4bZnH1I AkzHbtWIOBrjWJ34ZMAgI5Q56Du9TBbBvCdM9azmrQjSu/2kdsPBPcUyOpnUCsCx NyXo9g== =x71l -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510' into staging Add CPUClass::tlb_fill. Improve tlb_vaddr_to_host for use by ARM SVE no-fault loads. # gpg: Signature made Fri 10 May 2019 19:48:37 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20190510: (27 commits) tcg: Use tlb_fill probe from tlb_vaddr_to_host tcg: Remove CPUClass::handle_mmu_fault tcg: Use CPUClass::tlb_fill in cputlb.c target/xtensa: Convert to CPUClass::tlb_fill target/unicore32: Convert to CPUClass::tlb_fill target/tricore: Convert to CPUClass::tlb_fill target/tilegx: Convert to CPUClass::tlb_fill target/sparc: Convert to CPUClass::tlb_fill target/sh4: Convert to CPUClass::tlb_fill target/s390x: Convert to CPUClass::tlb_fill target/riscv: Convert to CPUClass::tlb_fill target/ppc: Convert to CPUClass::tlb_fill target/openrisc: Convert to CPUClass::tlb_fill target/nios2: Convert to CPUClass::tlb_fill target/moxie: Convert to CPUClass::tlb_fill target/mips: Convert to CPUClass::tlb_fill target/mips: Tidy control flow in mips_cpu_handle_mmu_fault target/mips: Pass a valid error to raise_mmu_exception for user-only target/microblaze: Convert to CPUClass::tlb_fill target/m68k: Convert to CPUClass::tlb_fill ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2019-05-16 13:15:08 +01:00
..
cpu.c	target/nios2: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
cpu.h	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
helper.c	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
helper.h
Makefile.objs	Add Nios II semihosting support.	2019-04-29 16:09:51 +01:00
mmu.c	target/nios2: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
mmu.h	Clean up header guards that don't match their file name	2019-05-13 08:58:55 +02:00
monitor.c	target: Clean up how the dump_mmu() print	2019-04-18 22:18:59 +02:00
nios2-semi.c	Add Nios II semihosting support.	2019-04-29 16:09:51 +01:00
op_helper.c	nios2: do not include exec-all.h from cpu.h	2018-06-01 14:15:10 +02:00
translate.c	tcg: Hoist max_insns computation to tb_gen_code	2019-04-24 13:04:33 -07:00