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Arguably the target_cpu_copy_regs function for each architecture is misnamed as a number of the architectures also take the opportunity to fill out the TaskState structure. This could arguably be factored out into common code but that would require a wider audit of the architectures. For now just replicate for riscv so we can correctly report semihosting information for SYS_HEAPINFO. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210323165308.15244-9-alex.bennee@linaro.org>