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xemu/target/hppa
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Sven Schnelle d5de20bd84 target/hppa: add TLB protection id check 
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Message-Id: <20190311191602.25796-10-svens@stackframe.org>
[rth: Add required tlb flushing when prot id registers change.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-03-12 09:13:43 -07:00
..
cpu-qom.h
…
cpu.c
…
cpu.h
target/hppa: add TLB protection id check
2019-03-12 09:13:43 -07:00
gdbstub.c
target/hppa: add TLB protection id check
2019-03-12 09:13:43 -07:00
helper.c
target/hppa: add TLB protection id check
2019-03-12 09:13:43 -07:00
helper.h
target/hppa: add TLB protection id check
2019-03-12 09:13:43 -07:00
insns.decode
target/hppa: ignore DIAG opcode
2019-03-12 09:13:43 -07:00
int_helper.c
target: Do not include "exec/exec-all.h" if it is not necessary
2018-06-01 14:15:10 +02:00
machine.c
vmstate: constify VMStateField
2018-11-27 15:35:15 +01:00
Makefile.objs
target/hppa: Begin using scripts/decodetree.py
2019-02-12 08:48:27 -08:00
mem_helper.c
target/hppa: add TLB protection id check
2019-03-12 09:13:43 -07:00
op_helper.c
target/hppa: remove PSW I/R/Q bit check
2019-03-12 09:13:43 -07:00
trace-events
target/hppa: add TLB trace events
2019-03-12 09:13:43 -07:00
translate.c
target/hppa: add TLB protection id check
2019-03-12 09:13:43 -07:00