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xemu/target/m68k
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Laurent Vivier 250b1da35d target/m68k: implement opcode fetoxm1 
Example provided in the launchpad bug fails with:

   qemu: uncaught target signal 4 (Illegal instruction) - core dumped
   Illegal instruction (core dumped)

It appears fetoxm1 is not implemented:

   IN: expm1f
   0x800005cc: fetoxm1x %fp2,%fp0
   Disassembler disagrees with translator over instruction decoding
   Please report this to qemu-devel@nongnu.org

   (gdb) x/2hx 0x800005cc
   0x800005cc: 0xf200 0x0808

This patch adds the instruction.

Bug: https://bugs.launchpad.net/qemu/+bug/1881450
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200531131951.631902-1-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-02 13:59:02 +02:00
..
cpu-param.h
…
cpu-qom.h
cpu: Use DeviceClass reset instead of a special CPUClass reset
2020-03-17 19:48:10 -04:00
cpu.c
target/m68k: fix gdb for m68xxx
2020-05-06 09:29:26 +01:00
cpu.h
gdbstub: extend GByteArray to read register helpers
2020-03-17 17:38:38 +00:00
fpu_helper.c
target/m68k: implement opcode fetoxm1
2020-06-02 13:59:02 +02:00
gdbstub.c
gdbstub: extend GByteArray to read register helpers
2020-03-17 17:38:38 +00:00
helper.c
gdbstub: Introduce gdb_get_float64() to get 64-bit float registers
2020-05-06 09:29:26 +01:00
helper.h
target/m68k: implement opcode fetoxm1
2020-06-02 13:59:02 +02:00
m68k-semi.c
Clean up inclusion of sysemu/sysemu.h
2019-08-16 13:31:53 +02:00
Makefile.objs
…
monitor.c
…
op_helper.c
target/m68k: Use cpu_*_mmuidx_ra instead of MMU_MODE{0,1}_SUFFIX
2020-01-15 15:13:10 -10:00
qregs.def
…
softfloat_fpsp_tables.h
…
softfloat.c
softfloat: Replace flag with bool
2020-05-19 08:40:50 -07:00
softfloat.h
…
translate.c
target/m68k: implement opcode fetoxm1
2020-06-02 13:59:02 +02:00