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a32134aad8
Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020, and create a configurable property for each defaulting to 96 and 64 (respectively) so that device modelers can set the value appropriately for their SoC. Other ARM processors also set their maximum number of used IRQs appropriately. Set the maximum theoretical number of GIC interrupts to 1020 and update the save/restore code to only use the appropriate number for each SoC. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Reviewed-by: Andreas Färber <afaerber@suse.de> [Peter Maydell: fixed minor whitespace snafu] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
56 lines
1.3 KiB
C
56 lines
1.3 KiB
C
/*
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* ARM RealView Emulation Baseboard Interrupt Controller
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*
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* Copyright (c) 2006-2007 CodeSourcery.
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* Written by Paul Brook
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*
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* This code is licensed under the GPL.
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*/
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#include "sysbus.h"
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#define NCPU 1
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/* Only a single "CPU" interface is present. */
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static inline int
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gic_get_current_cpu(void)
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{
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return 0;
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}
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#include "arm_gic.c"
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typedef struct {
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gic_state gic;
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MemoryRegion container;
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} RealViewGICState;
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static void realview_gic_map_setup(RealViewGICState *s)
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{
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memory_region_init(&s->container, "realview-gic-container", 0x2000);
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memory_region_add_subregion(&s->container, 0, &s->gic.cpuiomem[0]);
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memory_region_add_subregion(&s->container, 0x1000, &s->gic.iomem);
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}
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static int realview_gic_init(SysBusDevice *dev)
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{
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RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);
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/* The GICs on the RealView boards have a fixed nonconfigurable
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* number of interrupt lines, so we don't need to expose this as
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* a qdev property.
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*/
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gic_init(&s->gic, 96);
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realview_gic_map_setup(s);
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sysbus_init_mmio(dev, &s->container);
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return 0;
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}
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static void realview_gic_register_devices(void)
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{
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sysbus_register_dev("realview_gic", sizeof(RealViewGICState),
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realview_gic_init);
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}
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device_init(realview_gic_register_devices)
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