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5fafdf24ef
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
54 lines
1.3 KiB
C
54 lines
1.3 KiB
C
/*
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* ARM micro operations (templates for various register related
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* operations)
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef SET_REG
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#define SET_REG(x) REG = x
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#endif
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void OPPROTO glue(op_movl_T0_, REGNAME)(void)
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{
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T0 = REG;
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}
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void OPPROTO glue(op_movl_T1_, REGNAME)(void)
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{
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T1 = REG;
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}
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void OPPROTO glue(op_movl_T2_, REGNAME)(void)
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{
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T2 = REG;
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}
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void OPPROTO glue(glue(op_movl_, REGNAME), _T0)(void)
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{
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SET_REG (T0);
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}
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void OPPROTO glue(glue(op_movl_, REGNAME), _T1)(void)
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{
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SET_REG (T1);
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}
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#undef REG
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#undef REGNAME
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#undef SET_REG
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