Pavel Zbitskiy e1db291b9b target/s390x: add BAL and BALR instructions ...

These instructions are provided for compatibility purposes and are
used only by old software, in the new code BAS and BASR are preferred.
The difference between the old and new instruction exists only in the
24-bit mode.

In addition, fix BAS polluting high 32 bits of the first operand in
24- and 31-bit addressing modes.

Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com>
Message-Id: <20180821025104.19604-3-pavel.zbitskiy@gmail.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>

2018-08-28 17:37:01 +02:00

..

alpha

tcg: Pass tb and index to tcg_gen_exit_tb separately

2018-06-01 15:15:27 -07:00

arm

target/arm: Remove a handful of stray tabs

2018-08-24 13:17:48 +01:00

cris

tcg-next queue

2018-06-04 11:28:31 +01:00

hppa

tcg-next queue

2018-06-04 11:28:31 +01:00

i386

KVM: cleanup unnecessary #ifdef KVM_CAP_...

2018-08-23 18:46:25 +02:00

lm32

tcg-next queue

2018-06-04 11:28:31 +01:00

m68k

target/m68k: Merge disas_m68k_insn into m68k_tr_translate_insn

2018-06-11 12:43:42 +02:00

microblaze

target-microblaze: Rework NOP/zero instruction handling

2018-06-15 09:05:00 +02:00

mips

target/mips: Add definition of nanoMIPS I7200 CPU

2018-08-24 17:51:59 +02:00

moxie

tcg-next queue

2018-06-04 11:28:31 +01:00

nios2

tcg-next queue

2018-06-04 11:28:31 +01:00

openrisc

target/openrisc: Fix writes to interrupt mask register

2018-07-03 22:40:33 +09:00

ppc

ppc: add DBCR based debugging

2018-08-21 14:28:45 +10:00

riscv

RISC-V: Add trailing '\n' to qemu_log() calls

2018-06-08 13:15:33 +01:00

s390x

target/s390x: add BAL and BALR instructions

2018-08-28 17:37:01 +02:00

sh4

sh4: fix use_icount with linux-user

2018-08-20 00:11:06 +02:00

sparc

SPARC64: add icount support

2018-06-17 11:13:06 +01:00

tilegx

tcg-next queue

2018-06-04 11:28:31 +01:00

tricore

tcg: Pass tb and index to tcg_gen_exit_tb separately

2018-06-01 15:15:27 -07:00

unicore32

tcg: Pass tb and index to tcg_gen_exit_tb separately

2018-06-01 15:15:27 -07:00

xtensa

target/xtensa/cpu: Set owner of memory region in xtensa_cpu_initfn

2018-08-06 19:07:21 +01:00