xemu/riscv at e2b3ef75445fc2342b00680dad7af3618dc69deb - xemu

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History

Bin Meng e2b3ef7544 hw/riscv: sifive_e: Use MachineState::ram and MachineClass::default_ram_id

Using memory_region_init_ram(), which can't possibly handle vhost-user,
and can't work as expected with '-numa node,memdev' options.

Use MachineState::ram instead of manually initializing RAM memory
region, as well as by providing MachineClass::default_ram_id to
opt in to memdev scheme.

While at it add check for user supplied RAM size and error out if it
mismatches board expected value.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id: 20211020014112.7336-5-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

2021-10-22 23:35:47 +10:00

boot.c

target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl

2021-10-22 07:47:51 +10:00

Kconfig

hw/intc: Rename sifive_clint sources to riscv_aclint sources

2021-09-21 07:56:49 +10:00

meson.build

hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines

2021-07-20 15:32:49 +02:00

microchip_pfsoc.c

hw/riscv: microchip_pfsoc: Use MachineState::ram and MachineClass::default_ram_id