mirror of
https://github.com/xemu-project/xemu.git
synced 2024-11-30 15:00:34 +00:00
513eb437ae
sideleg and sedeleg csrs are not part of riscv isa spec anymore, these csrs were part of N extension which is removed from the riscv isa specification. These commits removed all traces of these csrs from riscv spec (https://github.com/riscv/riscv-isa-manual) - commit f8d27f805b65 ("Remove or downgrade more references to N extension (#674)") commit b6cade07034d ("Remove N extension chapter for now") Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220824145255.400040-1-rpathak@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
||
|---|---|---|
| .. | ||
| alpha.c | ||
| capstone.c | ||
| cris.c | ||
| hexagon.c | ||
| hppa.c | ||
| m68k.c | ||
| meson.build | ||
| microblaze.c | ||
| mips.c | ||
| nanomips.cpp | ||
| nanomips.h | ||
| nios2.c | ||
| riscv.c | ||
| sh4.c | ||
| sparc.c | ||
| xtensa.c | ||