Alistair Francis e5cc6aaeb5 hw/intc: ibex_plic: Convert the PLIC to use RISC-V CPU GPIO lines ...

Instead of using riscv_cpu_update_mip() let's instead use the new RISC-V
CPU GPIO lines to set the external MIP bits.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 0a76946981852f5bd15f0c37ab35b253371027a8.1630301632.git.alistair.francis@wdc.com

2021-09-21 07:56:49 +10:00

..

boot.c

hw/riscv/boot: Check the error of fdt_pack()

2021-07-15 09:35:46 +10:00

Kconfig

hw/char: Add config for shakti uart

2021-09-01 11:59:12 +10:00

meson.build

hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines

2021-07-20 15:32:49 +02:00

microchip_pfsoc.c

hw/riscv: microchip_pfsoc: Support direct kernel boot

2021-06-08 09:59:42 +10:00

numa.c

hw: Do not include qemu/log.h if it is not necessary

2021-05-02 17:24:50 +02:00

opentitan.c

hw/intc: ibex_plic: Convert the PLIC to use RISC-V CPU GPIO lines

2021-09-21 07:56:49 +10:00

riscv_hart.c

hw/riscv: hart: Add a new 'resetvec' property

2020-09-09 15:54:18 -07:00

shakti_c.c

hw/riscv: Connect Shakti UART to Shakti platform

2021-05-11 20:02:06 +10:00

sifive_e.c

arch_init.h: Don't include arch_init.h unnecessarily

2021-08-26 17:02:00 +01:00

sifive_u.c

arch_init.h: Don't include arch_init.h unnecessarily

2021-08-26 17:02:00 +01:00

spike.c

arch_init.h: Don't include arch_init.h unnecessarily

2021-08-26 17:02:00 +01:00

virt.c

hw/riscv/virt.c: Assemble plic_hart_config string with g_strjoinv()

2021-09-01 11:59:12 +10:00