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e997040e3f
This is is an abstraction of a POWER8 chip which is a set of cores plus other 'units', like the pervasive unit, the interrupt controller, the memory controller, the on-chip microcontroller, etc. The whole can be seen as a socket. It depends on a cpu model and its characteristics: max cores and specific inits are defined in a PnvChipClass. We start with an near empty PnvChip with only a few cpu constants which we will grow in the subsequent patches with the controllers required to run the system. The Chip CFAM (Common FRU Access Module) ID gives the model of the chip and its version number. It is generally the first thing firmwares fetch, available at XSCOM PCB address 0xf000f, to start initialization. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
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| .. | ||
| e500-ccsr.h | ||
| e500.c | ||
| e500.h | ||
| e500plat.c | ||
| fdt.c | ||
| mac_newworld.c | ||
| mac_oldworld.c | ||
| mac.h | ||
| Makefile.objs | ||
| mpc8544_guts.c | ||
| mpc8544ds.c | ||
| pnv.c | ||
| ppc4xx_devs.c | ||
| ppc4xx_pci.c | ||
| ppc405_boards.c | ||
| ppc405_uc.c | ||
| ppc405.h | ||
| ppc440_bamboo.c | ||
| ppc_booke.c | ||
| ppc.c | ||
| ppce500_spin.c | ||
| prep.c | ||
| spapr_cpu_core.c | ||
| spapr_drc.c | ||
| spapr_events.c | ||
| spapr_hcall.c | ||
| spapr_iommu.c | ||
| spapr_pci_vfio.c | ||
| spapr_pci.c | ||
| spapr_rng.c | ||
| spapr_rtas_ddw.c | ||
| spapr_rtas.c | ||
| spapr_rtc.c | ||
| spapr_vio.c | ||
| spapr.c | ||
| trace-events | ||
| virtex_ml507.c | ||